Ballistic metal-oxide-semiconductor field effect transistor

Natori, Kenji

doi:10.1063/1.357263

Cited by 597 publications

(373 citation statements)

References 11 publications

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“…On the other hand, the conduction band minimum of multilayer MoS 2 moves to a lower symmetry point in the k-space along the Γ-K line. This results in a higher valley degeneracy (g v = 6 for the Γ-K line) than SL MoS 2 , effectively tripling the density of states, implying higher carrier densities and higher currents in the ballistic limit 14 . The net drive current for a given voltage is a product of the carrier density and the velocity.…”

Section: Resultsmentioning

confidence: 99%

High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals

et al. 2012

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unlike graphene, the existence of bandgaps (1-2 eV) in the layered semiconductor molybdenum disulphide, combined with mobility enhancement by dielectric engineering, offers an attractive possibility of using single-layer molybdenum disulphide field-effect transistors in low-power switching devices. However, the complicated process of fabricating single-layer molybdenum disulphide with an additional high-k dielectric layer may significantly limit its compatibility with commercial fabrication. Here we show the first comprehensive investigation of processfriendly multilayer molybdenum disulphide field-effect transistors to demonstrate a compelling case for their applications in thin-film transistors. our multilayer molybdenum disulphide field-effect transistors exhibited high mobilities ( > 100 cm 2 V − 1 s − 1 ), near-ideal subthreshold swings (~70 mV per decade) and robust current saturation over a large voltage window. With simulations based on shockley's long-channel transistor model and calculations of scattering mechanisms, these results provide potentially important implications in the fabrication of highresolution large-area displays and further scientific investigation of various physical properties expected in other layered semiconductors.

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Section: Resultsmentioning

confidence: 99%

High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals

et al. 2012

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“…In this transmission view of short channel transistors, once the carriers overcome the barrier, they move quickly through the channel to the drain. The carrier velocity is dependent on the mobility at the barrier [6,7]. As stated above, the gate length and carrier mobility no longer directly appear in the functional dependence of I dsat.…”

Section: Eq [4]mentioning

confidence: 96%

“…For very short channel devices, the gate length and carrier mobility do not appear in the approximate expression for drive current I d . Approximate expressions for I dsat are [4,5,6,7] Long channel transistors…”

Section: Eq [1]mentioning

confidence: 99%

“…m = 1+(C dm /C ox ) where C dm is the bulk depletion capacitance. Lundstrom [6] and Natori [7] have shown that I dsat is limited by how many carriers pass over the barrier at the source of a short channel transistor. In this transmission view of short channel transistors, once the carriers overcome the barrier, they move quickly through the channel to the drain.…”

Section: Eq [4]mentioning

confidence: 99%

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Metrology (including Materials Characterization) for Nanoelectronics

Diebold¹

2005

AIP Conference Proceedings

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“…In the ballistic limit, the virtual source model becomes the top-of-the-barrier ballistic model [36,37] and for on-current conditions,…”

Section: Charge Control In a Nanoscale Hemtmentioning

confidence: 99%

Device Physics and Performance Potential of III-V Field-Effect Transistors

Liu

Pal²,

Lundstrom³

et al. 2010

Fundamentals of III-V Semiconductor MOSFETs

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The device physics and technology issues for III-V transistors are examined from a simulation perspective. To examine device physics, an InGaAs HEMT structure similar to those being explored experimentally is analyzed. The physics of this device is explored using detailed, quantum mechanical simulations based on the non-equilibrium Green's function formalism. In this chapter, we: (1) elucidate the essential physics of III-V HEMTs, (2) identify key technology challenges that need to be addressed, and (3) estimate the expected performance advantage for III-V transistors. IntroductionDriven by tremendous advances in lithography, the semiconductor industry has followed Moore's law by shrinking transistor dimensions continuously for the last 40 years. The big challenge going forward is that continued scaling of planar, silicon, CMOS transistors will be more and more difficult because of both fundamental limitations and practical considerations as the transistor dimensions approach ten nanometers. The issues at small gate lengths are many fold. First, transistor scaling increases the number of gates on a chip and the operating frequency. To prevent the chip from overheating, the power dissipation should be limited, which requires lowering the power supply voltage while maintaining the ability to deliver high oncurrents for each new generation of technology. Secondly, the drain bias decreases the energy barrier height between the source and channel in a transistor due to 2D electrostatics. Degraded short channel effects become more significant as the gate length gets shorter, and the increased off-state leakage has pushed the standby power to its practical limit. Thirdly, the accompanying scaled oxide thickness provides better gate control of the channel potential, but this inevitably increases S. Oktyabrsky, P. D. Ye (eds.), Fundamentals of III-V Semiconductor MOSFETs,

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Ballistic metal-oxide-semiconductor field effect transistor

Cited by 597 publications

References 11 publications

High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals

High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals

Metrology (including Materials Characterization) for Nanoelectronics

Device Physics and Performance Potential of III-V Field-Effect Transistors

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