Analyzing Parameters Influencing Stress and Drift in Moulded Hall Sensors

Fischer, Sebastian; Fellner, Thomas; Wilde, Jürgen; Beyer, H.; Janke, R.

doi:10.1109/estc.2006.280191

Cited by 10 publications

(6 citation statements)

References 12 publications

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“…the modulation of the depletion layer surrounding the resistor depending on the operating conditions and the ensuing modulation of the resistance value, can lead to considerable errors in the bridge signal under differential stress condition σ x x − σ yy , according to (14). This undesired parasitic effect is significantly reduced by the use of strongly doped resistors.…”

Section: A High Versus Low Dopingmentioning

confidence: 97%

“…Moreover, a change of the environmental conditions of packaged Hall sensors, i.e., temperature, humidity [9], [10], and cyclic loads [11] lead to a change of the package stress and consequently lead to a change of the sensitivity [5], [12]. An optimized assembly process can help to decrease the stress-related sensitivity drift of Hall sensors [13], [14]. Nevertheless, additional measures are required to overcome the remaining sensitivity drift caused by the package.…”

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confidence: 97%

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Package Stress Monitor to Compensate for the Piezo-Hall Effect in CMOS Hall Sensors

Huber¹,

Schott²,

Oliver

2013

IEEE Sensors J.

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Package-induced stress changes the sensitivity of planar Hall plates via the piezo-Hall effect. In this paper, we present a novel stress sensor that allows us to compensate for this undesired mechanical cross-sensitivity. The new CMOScompatible sensor is based on a Wheatstone bridge built of eight appropriately arranged n-and p-doped piezoresistors. The differential output signal V bridge of the sensor is proportional to the sum of in-plane normal stresses σ x x +σ yy with the sensitivity S bridge,σ = ∂ V bridge / V bias /∂ σ x x + σ yy = −0.047GPa −1 . Doping concentrations larger than 10 19 cm −3 for both the n-and p-type resistors are used to minimize the parasitic resistor mismatch due to the junction field effect. Simultaneously, the highly doped resistors keep the relative thermal cross-sensitivity of the sensor as small as 74 ppm K −1 . In contrast to conventional sensor rosettes, the new sensor has the advantage of offering a differential output signal. The measured signal is successfully used to decrease the stress-impact on the sensitivity of CMOS Hall sensors by a factor of five.

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Section: A High Versus Low Dopingmentioning

confidence: 97%

mentioning

confidence: 97%

Package Stress Monitor to Compensate for the Piezo-Hall Effect in CMOS Hall Sensors

Huber¹,

Schott²,

Oliver

2013

IEEE Sensors J.

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“…Stresses and strains will alter the functionality of the device. Fischer et al [55] states that package induced stress can lead to a change of the sensitivity by ± 4% and of the offset voltage up to 60% of full-scale in a Hall sensor (alteration of the electrical properties due to the piezo properties). The outdoor climates and the climates in the PC and PA66-30GF enclosures exposed to the six locations have been compared to a threshold of a steady-state of 25 ˚C and 60% RH.…”

Section: Acceleration Factorsmentioning

confidence: 99%

Humidity build-up in electronic enclosures exposed to different geographical locations by RC modelling and reliability prediction

Conseil-Gudla

Staliulionis

Mohanty

et al. 2018

Microelectronics Reliability

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Electronic devices are exposed to a wide range of climatic conditions. This study shows a reliability prediction of electronic devices exposed to different climates (from arid to humid and cold to hot regions). Temperature and humidity probability distribution functions have been calculated to indicate the change of climate exposure along year. While temperature and relative humidity (RH) are important factors in terms of water diffusion and electronic reliability, the internal climatic condition of 25 ˚C and 60% RH is widely used as threshold for electronic safety. Acceleration factors according to this steady state (25 ˚C and 60% RH) have been calculated for the different climates, and the protection offered by the enclosures has been estimated under different casing materials and resistor-capacitor (RC) simulation. This method offers a way to predict the average value of failure rate for electronic devices based on climate information and enclosure material.

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“…However, X-ray diffraction stress measurement is applicable to fine-grained materials and requires producing diffraction for any orientation of the specimen surface and only elastic strains are measured. As to the experiment method using piezoresistors, test chips containing piezoresistive stress sensors are used to characterize the in situ die surface stress in different packaging technologies, reliability test and manufacture process, such as area array packaging [10] , stacked chips [11] , microprocessor packaging due to thermal and power cycling 12 and packaging of MEMS devices with stress sensitive structures [13,14] . Typically, in these applications a small number of piezoresistors are connected in a Wheatstone bridge configuration.…”

Section: Introductionmentioning

confidence: 99%

On chip micro stress test circuit for miniature component

Wang

Qin

Luo

et al. 2015

Ninth International Symposium on Precision Engineering Measurement and Instrumentation

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Adhesive bonding is a popular assembly method for miniaturized component composed of parts with different materials. However, it also inevitably introduces assembly stresses in some stress-sensitive structures, which adversely influence the accuracy of the performance, as well as the long-term stability of the component. An on chip piezoresistive micro stress test circuit was designed and tested in this paper. Piezoresistors were fabricated by doping Boron to n-type silicon wafer. The sensitive structure on the micro part was a flexible beam which had a thickness of 50 μm. Silver epoxy adhesive and double epoxy adhesive were used in the assembly process and the stresses parallel and perpendicular to the flexible beam were calculated. The experimental results showed that silver epoxy adhesive introduced larger stress because the difference in thermal expansion coefficients between silver epoxy adhesive and silicon are larger than that of double epoxy adhesive. Aging tests were also carried out and 46 percent of stress on average was released in 100 days at room temperature. This preliminary work implied that the stress distribution of the sensitive structure at all stages of the assembly could be measured using on chip micro stress test circuit.

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Analyzing Parameters Influencing Stress and Drift in Moulded Hall Sensors

Cited by 10 publications

References 12 publications

Package Stress Monitor to Compensate for the Piezo-Hall Effect in CMOS Hall Sensors

Package Stress Monitor to Compensate for the Piezo-Hall Effect in CMOS Hall Sensors

Humidity build-up in electronic enclosures exposed to different geographical locations by RC modelling and reliability prediction

On chip micro stress test circuit for miniature component

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