Analytical Drain Current Compact Model in the Depletion Operation Region of Short-Channel Triple-Gate Junctionless Transistors

Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

“…The high-k metal gate stack consists of HfSiON/TiN/p + -polysilicon with an equivalent oxide thickness equal to 1.2 nm and the doping concentration of the channel is 2 × 10 19 cm -3 . Details of the device fabrication processes are presented in [12].…”

Analysis of subthreshold swing in junctionless double gate MOSFET using stacked high-k gate oxide

“…The subthreshold swing is defined as the change of the top gate voltage to the logarithmic value of the drain current and is expressed as follows. In the case of the JLDG MOSFET, most of the drain current moves along the central axis, so x = xmin and y = tsi/2 are substituted into (5) to obtain the ∂ / [26]. As a result, the subthreshold swing model of (6) can be obtained from (4) and (5).…”

Triple-gate junctionless MOSFETs

“…As mentioned, the on-state current of JLTs is lower than that of the inversion mode devices [46] and therefore, the off-state leakage current is of great significance for these devices. Several works are referred in previous literature regarding compact models for the drain current in the on-state region [59][60][61][62] and leakage current investigation in the off-state region of JNTs [63][64][65][66][67][68]. In particular, the effect of longitudinal band-to-band tunneling (BTBT) from the channel to the drain in the off-state range of operation of silicon-on-insulator (SOI) and bulk planar JLTs [63], vertically stacked nanowire JNTs [64] and dual-material gate nanowire JLTs [65,66] have been studied with numerical simulations to optimize the on/off current ratio.…”

“…The observed mobility degradation with decreasing the channel length has been explained with defects near the source and drain regions induced by the additional implantation used to reduce the access series resistance. The impact of these defects on the device performance has been introduced considering the case of gate insulator/channel interface traps uniformly distributed along the channel [62].…”

“…To include ballistic effects in DD model, from a compact model viewpoint the channel region can be represented by a chain of DD resistors and one ballistic resistor which does not disappear for long channels (quasi-ballistic transport) and a second channel that bypasses the first one with a ballistic resistor (pure ballistic transport) [108,109]. In this work, considering that there are no electrons traveling purely ballistically in low mobility JNTs and taking interface traps of density 510 11 cm -2 eV -1 which is in line with the near ideal subthreshold slope of typical long-channel JL TG MOSFETs, the DD analytical compact model is extended to the quasi-ballistic regime by modifying the lowfield mobility incorporated in the high-field effective mobility [62]. The low-field electron mobility µ in JL transistors can be reliably extracted from the slope of the Yfunction in the linear region (V ds = 30 mV) defined as / ds m Y I g  :…”