2021
DOI: 10.1109/jestpe.2020.2992946
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Analysis of Large-Signal Output Capacitance of Transistors Using Sawyer–Tower Circuit

Abstract: A detailed analysis on the Sawyer-Tower method used in the measurement of large-signal output capacitance (Co) of power transistors is presented, followed by important design recommendations to obtain accurate results. Key factors affecting the proper implementation of the technique, such as power amplifier characteristics, load slew-rate, reference capacitor (C ref) and reverse conduction of the device are addressed, with accompanying simulation and experimental results for Si, SiC and GaN devices. A thorough… Show more

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Cited by 21 publications
(10 citation statements)
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References 26 publications
(40 reference statements)
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“…In its OFF-state, a resonance is produced between the load inductor and the DUT's C OSS ; the C OSS loss is extracted by analyzing the loss in this resonance process based on the DUT's V DS or I DS waveforms. Despite the simpler setup, the accuracy of these electrical approaches may be compromised due to the variability and noise of waveforms and equipment, e.g., limited probe bandwidth, probe delays, and waveform distortion at high frequencies [113], [114]. In addition to the trade-off between thermal and electrical approaches, the Calorimetric and Sawyer-Tower methods only involve the device OFF-state, which disallows for the study of the impact of ON-state current on COSS loss.…”
Section: B Output Capacitance Lossmentioning
confidence: 99%
“…In its OFF-state, a resonance is produced between the load inductor and the DUT's C OSS ; the C OSS loss is extracted by analyzing the loss in this resonance process based on the DUT's V DS or I DS waveforms. Despite the simpler setup, the accuracy of these electrical approaches may be compromised due to the variability and noise of waveforms and equipment, e.g., limited probe bandwidth, probe delays, and waveform distortion at high frequencies [113], [114]. In addition to the trade-off between thermal and electrical approaches, the Calorimetric and Sawyer-Tower methods only involve the device OFF-state, which disallows for the study of the impact of ON-state current on COSS loss.…”
Section: B Output Capacitance Lossmentioning
confidence: 99%
“…energy loss, 1 𝐸 diss , and can be calculated using a charge versus voltage (QV) curve as Fig. 1(e) indicates [7], [10]. The OFFstate losses related to the leakage current through the device channel are generally negligible, especially in comparison to 𝐸 diss losses for MHz-range frequencies [10].…”
Section: Active-device Losses In Resonant Power Convertersmentioning
confidence: 99%
“…1(e) indicates [7], [10]. The OFFstate losses related to the leakage current through the device channel are generally negligible, especially in comparison to 𝐸 diss losses for MHz-range frequencies [10]. Therefore, the total power loss is in S, at a switching frequency of 𝑓 sw , is given by (4), where 𝑃 diss = 𝑓 sw • 𝐸 diss .…”
Section: Active-device Losses In Resonant Power Convertersmentioning
confidence: 99%
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“…However, it has been reported that in the LLC (and other resonant converters), although the high-voltage (HV) primary side devices are soft-switched, their switching loss does not completely disappear [8]. The phenomenon can be interpreted as an equivalent series resistance (R oss ) appearing in series to the output capacitance of the devices (C oss ) during the resonant transitions [9][10][11][12][13][14][15][16]. However, there are no similar reports about the soft-switching loss contribution of the secondary side low-voltage (LV) rectifiers, even though the most mature technology for the LV secondary side rectifiers is the Silicon (Si) Trench MOSFET with shield-plate [17][18][19][20][21], and it is known that in their construction a series resistance appears with the output capacitance [22][23][24].…”
Section: Introductionmentioning
confidence: 99%