Nanometer-scale transistors based on III-V compound semiconductors, such as GaAs, InAs, and InP, are at the heart of many high-speed and high-frequency electronic systems 10. Due to their high electron mobilities, these devices exhibit very high small-signal cutoff frequencies, in the terahertz range 11. However, the high-frequency large-signal performance of transistors is still a challenge, since it is severely limited by the output capacitance Cout, electron saturation velocity and critical electric field 12. The maximum switching speed of a transistor (Fig. 1a) with saturation current Imax is limited to performance semiconductor materials. GaAs and InP are limited to the JFOM, while Cout-limited rise-rate of 1 V/ps restricts the performance of SiC, GaN, and Diamond.

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In this letter, we present a new measurement technique to evaluate the large-signal output capacitance (COSS) of transistors as well as the COSS energy dissipation (EDISS), based on the nonlinear resonance between a known inductor and the output capacitance of the device under test. The method is simple and robust, and only requires a single voltage measurement to extract the large-signal COSS both in charging and discharging transients. By changing the circuit parameters, it is possible to tune the resonance frequency (even above 40 MHz) and the voltage swing (even above 1 kV) with dv/dt exceeding 100 V/ns, even though the method relies only on a low-voltage DC source, without the need for high-voltage RF amplifiers. The single-pulse operation of the method enables measuring COSS and EDISS at very high frequency and dv/dt values without any thermal runaway. Using the proposed method, we extracted large-signal COSS and EDISS of power transistors based on different semiconductor technologies. The obtained results were verified by Sawyer-Tower method and data reported in the literature. The precise characterization of large-signal COSS of transistors presented in this letter is essential for the design of power converters, especially those operating at high switching frequencies.

The low ON-resistance of wide-band-gap (WBG) transistors is a key feature for efficient power converters, however, the anomalous loss in their output capacitance (COSS) severely limits their performance at high switching frequencies. Characterizing COSS-losses based on large-signal measurement methods requires an extensive effort, as separate measurements are needed at different operation points, including voltage-swing, frequency, and dv/dt. Furthermore, there is a practical trade-off in the maximum voltage and frequency applied to the device. Here we introduce a new circuit model, including an effective COSS and a frequency-dependent series-resistance, along with a simple small-signal method to fully characterize COSS-losses in WBG transistors. The method accurately predicts COSS-losses at any voltage-swing or frequency. Contrary to other methods, this technique directly leads to a general identification of COSS-losses at different operation points, revealing new insights on COSS-losses in WBG transistors, especially the dependence of EDISS on voltage and frequency. Based on the proposed approach, the issue of COSSlosses in enhancement-mode GaN and SiC transistors was assigned to the limited quality-factor of COSS. The precise characterization of COSS-losses proposed in this letter is essential for designing efficient high-frequency power converters.

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