The switching loss of the secondary side rectifiers in LLC resonant converters can have a noticeable impact on the overall efficiency of the complete power supply and constrain the upper limit of the optimum switching frequencies of the converter. Two are the main contributions to the switching loss in the secondary side rectifiers: on the one hand, the reverse recovery loss (Qrr), most noticeably while operating above the series resonant frequency; and on the other hand, the output capacitance (Coss) hysteresis loss, not previously reported elsewhere, but present in all the operating modes of the converter (under and above the series resonant frequency). In this paper, a new technique is proposed for the measurement of the switching losses in the rectifiers of the LLC and other isolated converters. Moreover, two new circuits are introduced for the isolation and measurement of the Coss hysteresis loss, which can be applied to both high-voltage and low-voltage semiconductor devices. Finally, the analysis is experimentally demonstrated, characterizing the switching loss of the rectifiers in a 3 kW LLC converter (410 V input to 50 V output). Furthermore, the Coss hysteresis loss of several high-voltage and low-voltage devices is experimentally verified in the newly proposed measurement circuits.

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The phase shift full bridge (PSFB) is a widely known isolated DC-DC converter topology commonly used in medium to high power applications, and one of the best candidates for the front-end DC-DC converter in server power supplies. Since the server power supplies consume an enormous amount of power, the most critical issue is to achieve high efficiency. Several organizations promoting electrical energy efficiency, like the 80 PLUS, keep introducing higher efficiency certifications with growing requirements extending also to light loads. The design of a high efficiency PSFB converter is a complex problem with many degrees of freedom which requires of a sufficiently accurate modeling of the losses and of efficient design criteria. In this work a losses model of the converter is proposed as well as design guidelines for the efficiency optimization of PSFB converter. The model and the criteria are tested with the redesign of an existing reference PSFB converter of 1400 W for server applications, with wide input voltage range, nominal 400 V input and 12 V output; achieving 95.85% of efficiency at 50% of the load. A new optimized prototype of PSFB was built with the same specifications, achieving a peak efficiency of 96.68% at 50% of the load.