“…The gapless electronic structure of graphene, which exhibits linear energy dispersion near the Dirac voltage, permits the development of an unconventional device architecture. − In particular, graphene can be exploited as the electrode that yields a tunable semiconductor–electrode injection barrier as the Fermi energy level of graphene can be tuned widely by the application of an external electric field. − This mechanism sets the basis for graphene-based vertical Schottky barrier transistors (v-SBTs); the current level of these devices can be changed by controlling the SB height via tuning the gate bias. − Such a vertical transistor structure is expected to trigger a paradigm shift in electronic device architecture and associated circuit design. A vertical channel, unlike the lateral channel used in conventional transistors, can, in principle, mitigate the challenges to achieving a nanoscale channel length as the channel length can be determined simply from the thickness of the semiconductor layer. ,,− Furthermore, the vertical configuration of the unit transistor may facilitate the integration of multiple devices in an entirely different vertical scheme. − Vertical stacking of unit devices does not consume additional chip estate beyond what is needed for a single device placed at the bottom. , Moreover, the vertically integrated devices based on layer-by-layer stacking of functional materials do not require saving a well spacing between the n- and p-channels, which is necessary in the conventional lateral-type CMOS technology to prevent crosstalk between the complementary channels and to avoid latch up. In fact, a common design rule for the well spacing is to separate the n- and p-MOSFET channels by 6 times the minimum width of the line, whereas the vertically stacked channels from additive processes do not require this consideration.…”