An Offset Readout Current Sensing Scheme for One-Resistor RRAM-Based Cross-Point Array

Chen, You-Da; Chin, Albert

doi:10.1109/led.2018.2886552

Cited by 20 publications

(16 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The excellent endurance of the PVD-SiN x device is related to the high number of defects that can be set and reset easily, with less destruction to the dielectric material. Figure 8(a,b) display the device-to-device and cycle-to-cycle distributions of V set and V reset respectively, which are critical for the RRAM cross-point array [24][25][26] . The coefficient of variation (CV) was used to study the distribution and is defined as follows:…”

mentioning

confidence: 99%

See 1 more Smart Citation

High Performance All Nonmetal SiNx Resistive Random Access Memory with Strong Process Dependence

Yen

Chin

Gritsenko

2020

Sci Rep

Self Cite

View full text Add to dashboard Cite

All-nonmetal resistive random access memory (RRAM) with a n + -Si/Sin x /p + -Si structure was investigated in this study. the device performance of Sin x developed using physical vapor deposition (PVD) was significantly better than that of a device fabricated using plasma-enhanced chemical vapor deposition (pecVD). the Sin x RRAM device developed using pVD has a large resistance window that is larger than 10 4 and exhibits good endurance to 10 5 cycles under switching pulses of 1 μs and a retention time of 10 4 s at 85 °C. Moreover, the SiN x RRAM device developed using pVD had tighter device-todevice distribution of set and reset voltages than those developed using pecVD. Such tight distribution is crucial to realise a large-size cross-point array and integrate with complementary metal-oxidesemiconductor technology to realise electronic neurons. the high performance of the Sin x RRAM device developed using pVD is attributed to the abundant defects in the pVD dielectric that was supported by the analysed conduction mechanisms obtained from the measured current-voltage characteristics.Resistive random access memory (RRAM) 1-26 has attracted considerable attention over the past two decades due to its simple structure, nonvolatility, high scalability, rapid switching speed, and relatively low operating power. These advantages make RRAM devices suitable for use in future artificial intelligence and neuromorphic computing applications 1-4 . A variety of binary composite materials, such as HfO x , TaO x , TiO x , SiO x , and GeO x , that exhibit different device properties have been used as the switching layer. Although various conduction mechanisms for RRAMs have been proposed, the carrier transport behaviour of RRAMs still has not been completely confirmed. To prevent the metal ions from contributing to transport behaviour, we pioneered nonmetal GeO x dielectric RRAM devices 6-10 and all-nonmetal N + -Si/SiO x /P + -Si RRAM devices 11 . In this study, we investigated the all-nonmetal SiN x RRAM devices in which the bond enthalpy of SiN is lower than that of SiO 27 . The SiN x material has been widely used in the semiconductor industry for various applications, such as the passivation layer of an integrated circuit and the charge-trapping layer of a flash memory. This material can be easily integrated into complementary metal-oxide-semiconductor (CMOS) technology. Moreover, the RRAM device performance strongly depends on the SiN x formation process. A high-performance RRAM device with a large memory window, good endurance, long retention time, and tight device-to-device distribution of the set-reset voltages V set -V reset is only achievable when the SiN x layers are formed using low-temperature physical vapor deposition (PVD) rather than the standard plasma-enhanced chemical vapor deposition (PECVD). The high-performance SiN x RRAM device developed using PVD (PVD-SiN x RRAM device) is linked to the high number of defects and high amount of defect-related current conduction in the SiN x dielectric.

show abstract

mentioning

confidence: 99%

“…where σ is the standard deviation, and μ is the mean value. The lower CV value represents a tighter distribution and is crucial for a larger array size 26 . The device-to-device distributions were extracted from 25 different devices.…”

mentioning

confidence: 99%

High Performance All Nonmetal SiNx Resistive Random Access Memory with Strong Process Dependence

Yen

Chin

Gritsenko

2020

Sci Rep

Self Cite

View full text Add to dashboard Cite

show abstract

“…[110] Research is still underway for the optimum operation schemes yielding the best readout margin with the lowest power consumption. [103,[110][111][112] As well as the certain voltage being applied to the unselected lines, the introduction of selection devices in series with the cells is another solution to restrict the sneak current. The selection devices should have rectifying characteristics, reducing the current in a low voltage area, which is equal to the applied voltage at an unselected cell, such as V read /2 or V read /3.…”

Section: Operation Schemes and Selection Devicesmentioning

confidence: 99%

“…[ 110 ] Research is still underway for the optimum operation schemes yielding the best readout margin with the lowest power consumption. [ 103,110–112 ]…”

Section: Memristors and Cbasmentioning

confidence: 99%

Memristive Devices for New Computing Paradigms

Kim

Jang

2020

Advanced Intelligent Systems

View full text Add to dashboard Cite

Since the first programmable computers were invented, people have no longer been restricted to paper or canvas to process and store information. Due to the significant advances in complementary metal-oxide-semiconductor (CMOS) technology, computing performance has increased drastically based on Moore's law [1] and Dennard's law. [2] Currently, computing systems are designed based on von Neumann architecture systems, in which the processor and memory regions are separated and bridged by data buses. With the introduction of cache and improved storage capabilities, and with the development of transistor technology, computing performance has improved significantly. However, the processor and memory performance have improved at different rates. Consequently, the performance gap observed between memory hierarchies causes a delay that is known as a von Neumann bottleneck. According to the 2018 International Roadmap for Devices and Systems (IRDS), conventional computing architectures are expected to reach their physical limits in terms of performance by 2024. [3] However, three significant problems arise, of which the first is volatility. A CMOS operates by reading the capacitance values, which is advantageous in distinguishing on and off states. However, small technical nodes result in high capacity leaks, energy losses, and reliability issues. The second obstacle involves scaling. Because CMOS-based von Neumann computing systems have been developed using a three-terminal structure, which consists of a source, drain, and gate, the device size typically exceeds 6F 2 even with smaller feature sizes. As a result, it has become a common trend to fabricate smaller and more integrated devices. The third problem involves speed and energy issues. The incorporation of more sensors and edge computing products has led to data explosion; therefore, data are processed slower due to von Neumann bottlenecks, and an enormous amount of energy is required. Although features, such as bit-cost scalable (BiCS) technology [4] and a merger of processor and memory have been introduced to overcome these issues, [5] it is still necessary to transition to novel computing systems that are more advanced than CMOS-based von Neumann architectures. Memristor (memory resistor) technology, which was proposed by Chua, [6] has gained prominence as the most promising novel computing candidate. Unlike a CMOS, memristors, which show pinched I-V hysteresis, identify values through the resistive reading method rather than through the capacitance reading method. [7] Therefore, new computing systems based on memristors would give the opportunity to step toward next computing technologies. Moreover, because memristors can be integrated into crossbar arrays (CBAs), the theoretical density is 4F 2 , which is expected to overcome the scaling limit of CMOS-based computing. In this article, we introduce four types of memristor materials and present their operation mechanisms in detail. We describe what memristive CBAs consist of and how they operate, and we demonstrat...

show abstract

“…The purpose of all nonmetal RRAM device is to provide a different charge transport mechanism rather than the charge transport in normal metallic filament. Relatively small device variation and tight distribution can be reached in similar GeO x RRAM 16 that are crucial for array design 17 . After forming the RRAM device under 6 V and 100 μA current compliance, a large resistance window of 1.9 × 10 4 was measured at room temperature (RT), which decreases slightly to 8.7 × 10 3 after 10 4 s data retention.…”

Section: Introductionmentioning

confidence: 99%

All Nonmetal Resistive Random Access Memory

Yen

Gismatulin

Володин

et al. 2019

Sci Rep

Self Cite

View full text Add to dashboard Cite

Traditional Resistive Random Access Memory (RRAM) is a metal-insulator-metal (MIM) structure, in which metal oxide is usually used as an insulator. The charge transport mechanism of traditional RRAM is attributed to a metallic filament inside the RRAM. In this paper, we demonstrated a novel RRAM device with no metal inside. The N + -Si/SiO x /P + -Si combination forms a N + IP + diode structure that is different from traditional MIM RRAM. A large high-resistance/low-resistance window of 1.9 × 10 4 was measured at room temperature. A favorable retention memory window of 1.2 × 10 3 was attained for 10 4 s at 85 °C. The charge transport mechanism of virgin, high- and low-resistance states can be well modeled by the single Shklovskii-Efros percolation mechanism rather than the charge transport in metallic filament. X-ray photoelectron spectroscopy demonstrated that the value of x in SiO x was 0.62, which provided sufficient oxygen vacancies for set/reset RRAM functions.

show abstract

An Offset Readout Current Sensing Scheme for One-Resistor RRAM-Based Cross-Point Array

Cited by 20 publications

References 19 publications

High Performance All Nonmetal SiNx Resistive Random Access Memory with Strong Process Dependence

High Performance All Nonmetal SiNx Resistive Random Access Memory with Strong Process Dependence

Memristive Devices for New Computing Paradigms

All Nonmetal Resistive Random Access Memory

Contact Info

Product

Resources

About