An investigation of a molybdenum gate for submicrometer CMOS

Kwasnick, R. F.; Kaminsky, E.B.; Frank, Peter; Franz, G.A.; Saia, R.; Polasko, K. J.; Gorczya, T.B.

doi:10.1109/16.2575

Cited by 13 publications

(4 citation statements)

References 19 publications

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“…The electrical resistivity, work function, ease of deposition and ability to be dry etched have led molybdenum to be used as a gate metal of choice in planar and FinFET CMOS fabrication [1,2], and also in MEMS device realisation [3]. In these areas, numerous dry etch processes to pattern molybdenum based on a range of gas chemistries including NF 3 [4], Cl 2 [5], Cl 2 /O 2 [2], SF 6 /BCl 3 /Ar [3], and O 2 /Cl 2 /Ar [6] have been described.…”

Section: Introductionmentioning

confidence: 99%

Nanoscale molybdenum gates fabricated by low damage inductively coupled plasma SF6/C4F8 etching suitable for high performance compound semiconductor transistors

Cao

Missous

et al. 2015

Microelectronic Engineering

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Section: Introductionmentioning

confidence: 99%

Nanoscale molybdenum gates fabricated by low damage inductively coupled plasma SF6/C4F8 etching suitable for high performance compound semiconductor transistors

Cao

Missous

et al. 2015

Microelectronic Engineering

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“…Molybdenum (Mo) is a well-known CMOS-process compatible material. It has been utilized as a gate and interconnection material for MOSFET [1,2] and FinFET [2,3] fabrication in integrated circuits. It is also combined with other metals to obtain the low resistance ohmic contacts for AlGaN/AlGaN structures [4].…”

Section: Introductionmentioning

confidence: 99%

“…In 1980, Chow et al [14] used NF 3 gas plasma for Mo etching with the help of an oxide hard mask and obtained a selectivity of 2-3:1. In 1988, Kwasnick et al [1] used two step etching for the realization of a Mo gate electrode. In the first step, he used SF 6 /Cl 2 /O 2 to control the photoresist (PR) line width for the Mo gate and in the second step, CCl 4 /O 2 was used to take advantage of the high selectivity of 80:1 with respect to oxide for saving the oxide isolation.…”

Section: Introductionmentioning

confidence: 99%

Molybdenum etching using an SF₆, BCl₃ and Ar based recipe for high aspect ratio MEMS device fabrication

Sharma

Fernando

Deng

et al. 2013

J. Micromech. Microeng.

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This paper presents the development of a dry etch recipe for molybdenum (Mo), based on SF6, BCl3 and Ar gases for high-topography MEMS device fabrication. The recipe was optimized for a high Mo etch rate, a low Mo by-product generation and a low Mo undercut using photoresist (PR) masks. The presented optimized recipe is very effective in Mo etching using a PR mask. The Mo by-product generated during the Mo etch can be easily removed using the ACT NE-14 etch residue remover. This optimized recipe was also used for etching Mo electrodes using oxide, PR or composite oxide-PR masks to select the better mask and selectivity. It was observed in this study that Mo has a better selectivity when using an oxide hard mask. However, it has the serious drawback of generating by-products which are difficult to clean later on. On the other hand, Mo has a poor selectivity with PR masks compared with oxide masks but there was no issue of by-product cleaning. At the same time, no extra mask layer deposition is required for Mo etching. The optimized recipe was also used for Mo electrode etching using PR and PR-oxide composite masks for the demonstration of working film bulk acoustic wave resonators and actuator microelectromechanical system devices.

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“…2,3) High thermal stability is required to avoid chemical reactions with gate dielectrics and the surrounding insulators during device fabrication. To promote process integration, metal gates have been realized according to two approaches: gate-first [4][5][6] and gate-last. 7,8) The gate-first approach is superior due to its simple fabrication, similar to the conventional poly-gate process.…”

Section: Introductionmentioning

confidence: 99%

Investigation of NiSi Fully-Silicided Gate on SiO₂ and HfO₂ for Applications in Metal–Oxide–Semiconductor Field-Effect Transistors

Huang¹,

Tsui²

2006

Jpn. J. Appl. Phys.

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Effective work function modulation (È m,eff ) and the thermal/electrical stability of NiSi fully-silicided (FUSI) gates on SiO 2 and HfO 2 are investigated. A new method, implant-to-silicide, differing from the pre-doped method, is used to realize È m,eff adjustments. The È m,eff of NiSi FUSI gates on SiO 2 can be tuned by incorporating BF 2 þ or P þ dopants after silicidation. Nevertheless, the Fermi-pinning effect was observed in the NiSi/HfO 2 gate which limits the È m,eff adjustment. A thin SiO 2 interfacial layer can reduce the Fermi-pinning effect. A NiSi FUSI gate on SiO 2 is thermally stable up to 600 C. The thermal stress and impurity diffusion after a prolonged 600 C annealing degraded the oxide integration. The temperature of the post-silicidation process should be as low as possible to lessen the thermal stress and impurity diffusion.

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An investigation of a molybdenum gate for submicrometer CMOS

Cited by 13 publications

References 19 publications

Nanoscale molybdenum gates fabricated by low damage inductively coupled plasma SF6/C4F8 etching suitable for high performance compound semiconductor transistors

Nanoscale molybdenum gates fabricated by low damage inductively coupled plasma SF6/C4F8 etching suitable for high performance compound semiconductor transistors

Molybdenum etching using an SF₆, BCl₃ and Ar based recipe for high aspect ratio MEMS device fabrication

Investigation of NiSi Fully-Silicided Gate on SiO₂ and HfO₂ for Applications in Metal–Oxide–Semiconductor Field-Effect Transistors

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An investigation of a molybdenum gate for submicrometer CMOS

Cited by 13 publications

References 19 publications

Nanoscale molybdenum gates fabricated by low damage inductively coupled plasma SF6/C4F8 etching suitable for high performance compound semiconductor transistors

Nanoscale molybdenum gates fabricated by low damage inductively coupled plasma SF6/C4F8 etching suitable for high performance compound semiconductor transistors

Molybdenum etching using an SF6, BCl3 and Ar based recipe for high aspect ratio MEMS device fabrication

Investigation of NiSi Fully-Silicided Gate on SiO2 and HfO2 for Applications in Metal–Oxide–Semiconductor Field-Effect Transistors

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Molybdenum etching using an SF₆, BCl₃ and Ar based recipe for high aspect ratio MEMS device fabrication

Investigation of NiSi Fully-Silicided Gate on SiO₂ and HfO₂ for Applications in Metal–Oxide–Semiconductor Field-Effect Transistors