An approach for complete 2-D analytical potential modelling of fully depleted symmetric double gate junction less transistor

Abstract

A novel 2-D analytical potential model of source and drain region along with channel for a fully depleted symmetric double gate junction less transistor is presented in this paper. The boundary conditions for channel potential along the channel length is taken considering source and drain region and boundary conditions for source and drain potential model are derived from channel longitudinal potential expression. The potential model is validated using TCAD simulations. A method for scale length determination is also presented. Scale length expression is obtained from the transverse electrostatic potential expression. Scale length variation with silicon layer thickness and gate oxide thickness is shown. The dependence of Scale length on the dielectric constant is also shown for the three dielectrics-"SiO 2 ", "Al 2 O 3 " and "HfO 2 ".

Performance of monolayer Black Phosphorus DG-JLFET: An ab initio study

“…The FET is p-type doped with doping density considered for testing are 3.32 10  cm -2 and is taken as uniform throughout the entire device regions. Since BP exhibits high anisotropic carrier mobility with crystal orientation, we take only armchair direction (AC) as transport direction (as the current along the armchair direction is eight orders of magnitude larger than that in the zigzag (ZZ) direction for ML BP) [19][20][21], to achieve optimum performance. We employ the NEGF formalism to estimate the ballistic quantum transport properties of the device.…”

“…Additionally, due to its relatively small band gap, BP can be tuned into both p-type and n-type configurations in contrast to few-layer MoS2 which usually exhibits n-type behavior [13]. The phosphorus atoms of BP covalently bond to three neighbouring atoms but unlike graphene BP forms a puckered structure with out of plane ridges [15][16]. Individual layers of phosphorus atoms are held together by weak van der Waals forces [2,4].…”

Review—Recent Trends on Junction-Less Field Effect Transistors in Terms of Device Topology, Modeling, and Application

“…In 2022 Mendiratta et al 64 proposed the surface potential for the asymmetrical JL-dopingless DG FET by solving 2D Poisson's equation. This model was validated by plotting all the results on MATLAB and were compared with the results resulting from the TCAD tool.…”

“…Total surface potential developed by them was 64 : The potential of the TMSED-GAA-MOSFET can be approximated using the Superposition Technique 66,67 and the usual Two-D Poisson's equation. Subthreshold current (I sub ) for the device has been formulated as 65…”

An Approach for Drain Current Modeling Including Quantum Mechanical Effects for a DMDG Junctionless Field Effect Nanowire Transistor

“…To overcome the fabrication difficulty to maintain very steep junctions at low dimensions, recently, an alternate MOS structure named Junctionless transistor was proposed [1]. Several analytical models were developed for double gate junctionless transistor with symmetric gate, assymetric gates [2][3][4][5][6]. The quantum confinements models are also available in literature for these structures [7][8][9].…”