An analytical model for square GAA MOSFETs including quantum effects

Moreno, Eva María Olmedo; Roldán, J.B.; Ruiz, Francisco G.; Barrera, D.; Godoy, A.; Gámiz, F.

doi:10.1016/j.sse.2010.05.032

Cited by 29 publications

(20 citation statements)

References 34 publications

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“…(13 The drain current in SG MOSFET is obtained with the assumption that the mobility is independent of the position in the channel. It is expressed as,…”

Section: Compact Surrounding Gate Mosfet Modelmentioning

confidence: 99%

“…Yuan [11] developed an analytical model for threshold voltage shift in the surrounding gate MOSFETs considering quantum confinement. Yu-Sheng [12] described the quantum effects in surrounding gate MOSFET and Moreno [13] has studied the quantum effects in the square GAA MOSFETs. However, extensive studies are not done to analyse the quantum effects in surrounding gate MOSFETs.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Compact Quantum Model for Cylindrical Surrounding Gate MOSFETs using High-k Dielectrics

Vimala¹,

Balamurugan²

2014

Journal of Electrical Engineering and Technology

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-In this paper, an analytical model for Surrounding Gate (SG) metal-oxide-semiconductor field effect transistors (MOSFETs) considering quantum effects is presented. To achieve this goal, we have used variational approach for solving the Poission and Schrodinger equations. This model is developed to provide an analytical expression for inversion charge distribution function for all regions of device operation. This expression is used to calculate the other important parameters like inversion charge density, threshold voltage, drain current and gate capacitance. The calculated expressions for the above parameters are simple and accurate. This paper also focuses on the gate tunneling issue associated with high dielectric constant. The validity of this model was checked for the devices with different dimensions and bias voltages. The calculated results are compared with the simulation results and they show good agreement.

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“…(13 The drain current in SG MOSFET is obtained with the assumption that the mobility is independent of the position in the channel. It is expressed as,…”

Section: Compact Surrounding Gate Mosfet Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Compact Quantum Model for Cylindrical Surrounding Gate MOSFETs using High-k Dielectrics

Vimala¹,

Balamurugan²

2014

Journal of Electrical Engineering and Technology

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“…In TG metal‐oxide‐semiconductor field effect transistors (MOSFETs), three gates, which are controlled by a single gate contact, give rise to an excellent short‐channel effect (SCE) immunity, which in turn, makes the device ultra‐scalable . The quad‐gate (QG) MOSFET , in which four gates surround the channel, is a natural extension of TG MOSFETs for future ultra‐large‐scale integration. Ultimate gate control can be achieved in QG MOS devices as the four gates work in unison and do not allow the drain to take control on the channel charges.…”

Section: Introductionmentioning

confidence: 99%

Threshold voltage modeling for dual‐metal quadruple‐gate (DMQG) MOSFETs

Samoju

Tiwari

2015

Int J Numerical Modelling

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Summary In this paper, a three‐dimensional (3D) model of threshold voltage is presented for dual‐metal quadruple‐gate metal‐oxide‐semiconductor field effect transistors. The 3D channel potential is obtained by solving 3D Laplace's equation using an isomorphic polynomial function. Threshold voltage is defined as the gate voltage, at which the integrated charge (Qinv) at the ‘virtual‐cathode’ reaches to a critical charge Qth. The potential distribution and the threshold voltage are studied with varying the device parameters like gate metal work functions, channel cross‐section, oxide thickness, and gate length ratio. Further, the drain‐induced barrier lowering has also been analyzed for different gate length ratios. The model results are compared with the numerical simulation results obtained from 3D ATLAS device simulation results. Copyright © 2015 John Wiley & Sons, Ltd.

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“…Some compact models have already been developed for circuit simulation due to the advancement in processing technologies to fabricate nanowire transistors [1]. Also Multigate MOSFETs are considered as one of the most promising solution to reduce the short channel effects and to achieve high speed and high-package density in logic circuits and memories [2]. The Gate All-Around nanowire MOSFETs in which the gate oxide and the gate electrodes are wrapped around the channel region, exhibit excellent transconductance, improved short channel immunity and gate control due to strong confinement of the electric field from the Gate All-Around the channel [2,3].…”

Section: Introductionmentioning

confidence: 99%