An analytical method of evaluating variation of the threshold voltage shift caused by the negative-bias temperature stress in poly-Si TFTs

Analysis of Thermal Distribution in Low-Temperature Polycrystalline Silicon p-Channel Thin Film Transistors

“…Here, we obtained n ¼ 1=3. The value agreed well with a previous report 12) on ÁV t degradation based on an experiment under high temperature stress. In the reported, the voltage shift was attributed to the dissolution of hydrogen in SiO 2 film.…”

“…TFTs are fabricated on glass or plastic substrates which have poor thermal conductivity. [3][4][5][6][7][8][9][10][11][12] Therefore, it is very important to analyze the thermal distribution of the devices under operating conditions. Thus far, several papers discussing Joule heating have been published.…”

Degradation of static behaviour of poly-Si CMOS inverters under high frequency operation

“…To assure circuit's long lifetime, much investigation on LTPS TFT's reliability has been done. Device level degradation mechanisms include negative bias temperature instability (NBTI) [3][4][5], hot-carrier (HC) [6][7] and self-heating [8], etc. However, little work was done to investigate TFT reliability in circuit level.…”

On-Panel Output Buffer With Offset Compensation Technique for Data Driver in LTPS Technology

“…Their mismatch of can be compensated by a holding capacitor or the mathematical product of voltage gain. Since the device aging and the process variation cause large variation of LTPS TFTs [10], the on-panel analog output buffer easily suffers from an offset voltage mainly due to the device mismatch in differential pair stage. When the same gray levels are transmitted into two pixels through the driving output buffers with large offset voltage, the brightness of these two pixels will be different.…”