To overcome the offset voltage (V OS ) of output buffer due to large variation on characteristics of thin-film transistor (TFT) in low-temperature polysilicon (LTPS) technology, a class-B output buffer with offset compensation circuit for the data driver is presented in this paper. This proposed class-B output buffer can operate at 50-kHz operation frequency with a 2-8-V output swing for extended graphic array (XGA) application, and it has been demonstrated in 3-m LTPS technology. Using the offset compensation technique, the V OS of output buffer can be controlled within 100 mV under 2-to-8 V signal operation to achieve a high resolution and quality liquid crystal display (LCD) panel.
An 8Gbps receiver is implemented in 1.2V 0.11um high-voltage CMOS process for 8K 120Hz large-size display. Signal integrity is also improved to achieve maximum data rate of 8Gbps, 6Gbps over prototype channels for 65-inch display, 85-inch double-side driving display respectively. The measured bit error rate is below 1E-9 for PRBS-18.
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