2016
DOI: 10.1109/lmwc.2016.2517071
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An 88.5–110 GHz CMOS Low-Noise Amplifier for Millimeter-Wave Imaging Applications

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Cited by 69 publications
(16 citation statements)
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“…CMOS technology, traditionally used in digital and low-frequency analog circuits, has been quite capable of competing with the BiCMOS technology, at least up to millimeter-wave frequencies [70], and may be found suitable for THz applications in the near future. CMOS is favored owing to the low cost of fabrication and high level of achievable integration.…”
Section: Emerging Transistor Technologies Capable Of Operating In mentioning
confidence: 99%
“…CMOS technology, traditionally used in digital and low-frequency analog circuits, has been quite capable of competing with the BiCMOS technology, at least up to millimeter-wave frequencies [70], and may be found suitable for THz applications in the near future. CMOS is favored owing to the low cost of fabrication and high level of achievable integration.…”
Section: Emerging Transistor Technologies Capable Of Operating In mentioning
confidence: 99%
“…Lumped elements [88][89][90][91] occupy less chip areas, but simulation of lumped elements needs very detailed knowledge of the substrate and the cost is relatively higher. Next, transmission lines [92,93] have well-defined EM simulation environment, but they usually occupy comparatively larger chip areas. Microstrip lines are commonly used [94][95][96][97][98][99][100][101][102][103][104].…”
Section: Comparison and Summarymentioning
confidence: 99%
“…In this case, common source (CS) structure and cascode structure are two widely adopted topologies for CMOS LNAs. To achieve higher gain, multistages topology is usually employed . However, this leads to larger silicon area utilization and higher noise figure especially when cascode structure is utilized.…”
Section: Introductionmentioning
confidence: 99%
“…To achieve higher gain, multistages topology is usually employed. [4][5][6][7][8][9] However, this leads to larger silicon area utilization and higher noise figure especially when cascode structure is utilized. This is because the parasitic capacitance of common gate (CG) transistor introduces considerable noise at the output port.…”
Section: Introductionmentioning
confidence: 99%