AlN/GaN Insulated-Gate HEMTs With 2.3 A/mm Output Current and 480 mS/mm Transconductance

Zimmermann, Tom; Deen, David A.; Cao, Yu; Simon, John; Fay, Patrick; Jena, Debdeep; Xing, Huili Grace

doi:10.1109/led.2008.923318

Cited by 154 publications

(65 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…This suggests there are more performance gains to be obtained by the technology if the sources of these modes can be addressed, either by materials or device design. The binary-barrier AlN/GaN HEMT has set remarkable performance benchmarks due to the exceptionally high polarization-induced 2DEG density achievable (up to 6×10 13 cm −2 ) with high mobility (1800 cm 2 /Vs) [3], [13], [14], [15]. Yet only a handful of HEMT designs have leveraged a few of the attributes that are inherent to this particular heterostructure [14], [16], [17], [18].…”

mentioning

confidence: 99%

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

Deen

Storm

Katzer

et al. 2016

Applied Physics Letters

View full text Add to dashboard Cite

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics ft/fmax of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with ft/fmax of 48/60 GHz.

show abstract

mentioning

confidence: 99%

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

Deen

Storm

Katzer

et al. 2016

Applied Physics Letters

View full text Add to dashboard Cite

show abstract

“…The potential well formed at the interface is usually narrow enough to have well defined quantized energy levels in the direction perpendicular to the heterointerface, and in many cases the electronic system can be treated as a two-dimensional electron gas (2DEG) as mentioned in [13]. But in reality, the source of 2DEG in heterointerface is polarization which reduce impurity scattering, increase carrier mobility and enhance other characters of the device [14]. In the DHFET structure thick Al0.18Ga0.82N buffer layer favors the electron channel confinement and enables enhancing the device breakdown voltage as compared to the commonly used GaN buffer [15].…”

Section: Discussion On Device Physicsmentioning

confidence: 99%

Analytical Surface Charge Control Model for AlN/GaN/AlGaN Double Heterojunction Field-Effect Transistor

Khan¹

2013

JEEE

View full text Add to dashboard Cite

Abstract:We have argued that the nature of surface potential variation with gate voltage of AlN/GaN/AlGaN Double Heterojunction Field Effect Transistor (DHFET) is no different from that of the conventional GaAs/AlGaAs HEMT devices. Necessary simulated band diagrams have been presented to justify our claim and we have also proposed a nonlinear expression for Fermi level (E F ) variation with the two-dimensional electron gas density (2DEG). We have showed that our proposed expression provides better agreement with the numerical solution than the previous approximations. Besides, expression of surface charge density (n s ) variation with gate voltage (V G ) obtained using our proposed model, shows better fit with the numerical simulation data in wide range of bias conditions.

show abstract

“…Наиболее перспективными являют-ся барьеры на основе тройных растворов AlGaN и AlInN [2,3]. ГЭС со сверхтонким AlN-барьером при-знаны наиболее подходящими для изготовления тран-зисторов крайне высокого частотного диапазона из-за уменьшения эффектов короткого канала и низкого по-рогового напряжения [4][5][6]. Уже продемонстрированы AlN/GaN-транзисторы с предельной частотой усиления по току и мощности 342 и 518 ГГц, соответствен-но [5,7,8].…”

Section: Introductionunclassified

AlN/GaN-гетероструктуры для нормально закрытых транзисторов

Журавлев¹,

Малин²,

Мансуров³

et al. 2017

Физика И Техника Полупроводников

View full text Add to dashboard Cite

Рассчитана конструкция AlN/GaN гетероструктур со сверхтонким AlN-барьером для нормально закрытых транзисторов. Развита технология молекулярно-лучевой эпитаксии in situ пассивированных гетероструктур SiN/AlN/GaN с двумерным электронным газом. Продемонстрированы нормально закрытые транзисторы с максимальной плотностью тока около 1 А/мм, напряжением насыщения 1 В, крутизной до 350 мС/мм, пробивным напряжением более 60 В. В транзисторах практически отсутствуют эффекты затворного и стокового коллапса тока. DOI: 10.21883/FTP.2017.03.44215.8287

show abstract

AlN/GaN Insulated-Gate HEMTs With 2.3 A/mm Output Current and 480 mS/mm Transconductance

Cited by 154 publications

References 15 publications

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

Analytical Surface Charge Control Model for AlN/GaN/AlGaN Double Heterojunction Field-Effect Transistor

AlN/GaN-гетероструктуры для нормально закрытых транзисторов

Contact Info

Product

Resources

About