All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters

Chen, Shuai; Wang, Luke; Zhang, Hong; Murugesu, Rosanah; Dunwell, Dustin; Carusone, Anthony Chan

doi:10.1109/tvlsi.2017.2703141

Cited by 58 publications

(42 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…We note that F H acts as an inverse DFT operator, and the inclusion of a zero in the upper-leftmost position of the diagonal matrix in (39) constrains the solution to (16) to have zero mean as concluded in (17).…”

Section: Discussionmentioning

confidence: 99%

See 1 more Smart Citation

A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs

Salib

Flanagan

Cardiff

2019

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

Section: Discussionmentioning

confidence: 99%

“…Many estimation algorithms, e.g., [2]- [4], [11], [14], [15], [17]- [20], choose the first sub-ADC as a timing reference, i.e., r = τ 0 , which, recalling (5), results in the following variance…”

Section: Timing Referencementioning

confidence: 99%

A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs

Salib

Flanagan

Cardiff

2019

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

“…where y iÀ2 , y iÀ1 , y i , y iþ1 and y iþ2 are five adjacent samples that outputted from the adjacent sub-ADCs. If the compensation aims to specific frequency application, the propriate coefficients of the differentiator could be further calculated [31,24].…”

Section: Timing Mismatch Compensationmentioning

confidence: 99%

A channel multiplexing digital calibration technique for timing mismatch of time-interleaved ADCs

Yin

Liu

Chen

et al. 2019

IEICE Electron. Express

View full text Add to dashboard Cite

This paper presents an all-digital calibration technique for timeinterleaved ADC (TIADC) timing mismatch. The calibration architecture is based on a channel multiplexing architecture. For a M-channel TIADC, only one centralized calibration module is needed. Timing mismatches between channels are estimated by correlating the adjacent channel's outputs and a compensation algorithm based on the one-order five-point differentiator is employed to suppress the mismatches. Compared with conventional parallel calibration architecture, the proposed calibration architecture works well in higher Nyquist bands (NB) with high-scalability. The hardware consumption does not increase linearly with the number of sub-ADCs.

show abstract

“…In TIADC systems, channel mismatches seriously degrade the signalto-noise and distortion ratio (SNDR) and spurious-free dynamic range (SFDR) [18,19,20,21,22,23,24,25,26,27,28,29]. In published literature, studies of TIADC are based on the effects of channel mismatches on the spectrum or dynamic performance such as SNDR and SFDR [14,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32]. Under the condition of large bandwidth, it is impossible to eliminate channel mismatches completely.…”

Section: Introductionmentioning

confidence: 99%

Analysis of TIADC channel mismatch effects on high-resolution range profile

Xiao

Zhang

2020

IEICE Electron. Express

View full text Add to dashboard Cite

The wideband echo signals of the imaging radar can be processed by pulse compression to obtain high-resolution range profile (HRRP). The resolution of HRRP is proportional to the signal bandwidth. The pursuit of high resolution makes the bandwidth of radar transmitting signal larger and larger. And the corresponding sampling rate of receiver becomes so high that analog-to-digital conversion cannot be realized by a single chip correctly. Time-interleaved analog-to-digital converter (TIADC) technique increases sampling rate of radar receiver, but channel mismatches are brought in. Channel mismatches significantly deteriorate the dynamic performance of radar receiver. Effects of channel mismatch on SNR, SNDR and SFDR are studied in previous literatures. Derivation and simulation of TIADC channel mismatch effecting on HRRP are performed in this letter. Simulation results show that without considering the amplitude-frequency distortion and phase-frequency distortions of the radar system, when the gain mismatch is less than 0.7 times and the clock mismatch is less than 0.25 rad, the influence of the channel mismatch on the HRRP can be neglected. The results provide a reference for system design and compensation method, which are useful for the designer to determine whether complex channel mismatch calibration is necessary under specific application background.

show abstract

All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters

Cited by 58 publications

References 15 publications

A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs

A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs

A channel multiplexing digital calibration technique for timing mismatch of time-interleaved ADCs

Analysis of TIADC channel mismatch effects on high-resolution range profile

Contact Info

Product

Resources

About