Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications

Lee, S.; Johnson, J. B.; Greene, B.; Chou, A.; Zhao, Kai; Chowdhury, M.M.; Sim, J.H.; Kumar, Arvind; Kim, D.; Sutton, A.K.; Ku, S.H.; Liang, Yongchun; Wang, Y.; Slisher, D.; Duncan, K.; Hyde, P.; Thoma, R.; Deng, Jie; Deng, Yanqing; Rupani, R A; Williams, R.; Wagner, L.; Wermer, C; Li, H.; Johnson, B.; Daley, D.; Plouchart, J.-O.; Narasimha, S.; Putnam, C.; Maciejewski, E.; Henson, W.K.; Springer, S.

doi:10.1109/vlsit.2012.6242498

Cited by 9 publications

(2 citation statements)

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“…With the of 32-nm CMOS reaching 420/390 GHz [8] and 130-nm SiGe achieving an of 300/500 GHz [9], silicon-based technology can now provide sufficient performance at millimeter-wave frequencies while enabling low-cost large-scale production. Advanced W-band radar [10] and phased-array [11] systems have now been demonstrated utilizing SiGe technology.…”

Section: Introductionmentioning

confidence: 99%

On the Analysis and Design of Low-Loss Single-Pole Double-Throw W-Band Switches Utilizing Saturated SiGe HBTs

Schmid

Song

Coen

et al. 2014

IEEE Trans. Microwave Theory Techn.

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This paper describes the analysis and design of saturated silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) switches for millimeter-wave applications. A switch optimization procedure is developed based on detailed theoretical analysis and is then used to design multiple switch variants. The switches utilize IBM's 90-nm 9HP technology, which features SiGe HBTs with peak of 300/350 GHz. Using a reverse-saturated configuration, a single-pole double-throw switch with a measured insertion loss of 1.05 dB and isolation of 22 dB is achieved at 94 GHz after de-embedding pad losses. The switch draws 5.2 mA from a 1.1-V supply, limiting power consumption to less than 6 mW. The switching speed is analyzed and the simulated turn-on and turn-off times are found to be less than 200 ps. A technique is also introduced to significantly increase the power-handling capabilities of saturated SiGe switches up to an input-referred 1-dB compression point of 22 dBm. Finally, the impact of RF stress on this novel configuration is investigated and initial measurements over a 48-h period show little performance degradation. These results demonstrate that SiGe-based switches may provide significant benefits to millimeter-wave systems.Index Terms-Millimeter wave, 94 GHz, reverse saturation, saturation, silicon-germanium (SiGe) heterojunction bipolar transistor (HBT), single-pole double throw (SPDT), switch, transformer.

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Section: Introductionmentioning

confidence: 99%

On the Analysis and Design of Low-Loss Single-Pole Double-Throw W-Band Switches Utilizing Saturated SiGe HBTs

Schmid

Song

Coen

et al. 2014

IEEE Trans. Microwave Theory Techn.

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“…In recent years, the triple‐gate (TG) Silicon‐on‐Insulator (SOI) fin field‐effect transistor (FinFET) has been considered as attractive candidate for pursuing the downscaling beyond the 20‐nm technology node for digital and analog applications, thanks to its excellent immunity against the short‐channel effects (SCE) . Also, because of the successful shrinkage of its dimensions, it has been considered as attractive candidate for analog applications at very high frequency .…”

Section: Introductionmentioning

confidence: 99%

RF modeling of 40‐nm SOI triple‐gate FinFET

Martinez-Lopez¹,

Cerdeira

Tinoco³

et al. 2014

Int J Numerical Modelling

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These last years, the triple-gate fin field-effect transistor (FinFET) has appeared as attractive candidate to pursue the complementary metal-oxide semiconductor technology roadmap for digital and analog applications. However, the development of analog applications requires models that properly describe the static and RF behaviors as well as the extrinsic parameters related to the three-dimensional FinFET architecture, in order to establish adequate design strategies. We demonstrate the feasibility of the compact model developed for symmetric doped double-gate metal-oxide-semiconductor field-effect transistor (symmetric doped double-gate MOSFET) to reproduce the experimental dc and RF behaviors for 40-nm technology node Silicon-on-Insulator triple-gate FinFETs. Extrinsic gate capacitances and access extrinsic resistances have been included in order to properly predict the transistor small-signal behavior, the current gain, and the maximum available power gain cut-off frequencies. Finally, the improvement of the FinFET RF characteristics by the reduction of the parasitics is addressed. Figure 13. Comparison between the modeled (lines) and experimentally obtained (dots) maximum oscillation frequency. Figure 14. Simulated maximum oscillation frequency vs. source/drain fin extension for several values of fin spacing. 476 A. G. MARTINEZ-LOPEZ ET AL.

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CMOS technology scaling and its implications

Iizuka¹

2015

Digitally-Assisted Analog and Analog-Assisted Digital IC Design

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Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications

Cited by 9 publications

References 0 publications

On the Analysis and Design of Low-Loss Single-Pole Double-Throw W-Band Switches Utilizing Saturated SiGe HBTs

On the Analysis and Design of Low-Loss Single-Pole Double-Throw W-Band Switches Utilizing Saturated SiGe HBTs

RF modeling of 40‐nm SOI triple‐gate FinFET

CMOS technology scaling and its implications

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