AC stress reliability study on a novel vertical MOS transistor for non-volatile memory technology

Locati, J.; Marca, V. Della; Rivero, C.; Fornara, P.; Régnier, A.; Niel, S.; Coulié, K.

doi:10.1016/j.microrel.2020.113810

Cited by 2 publications

(2 citation statements)

References 10 publications

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“…In Fig. 3 (b) we can note at the beginning of I-V characteristics (around ID = 10E -11 A and VG = 0.2 V) a hump effect due to the parasitic transistors formed by the active rounding [10], [11]. This effect is reflected in the TGT characteristics (Fig.…”

Section: Device Description and Manufacturingmentioning

confidence: 88%

A Novel Trench-Based Triple Gate Transistor With Enhanced Driving Capability

Gay

Marca

Aziza

et al. 2021

IEEE Electron Device Lett.

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This paper addresses the design, implementation, and characterization of a novel highdensity Triple Gate Transistor in a 40 nm embedded Non-Volatile Memory technology. Deep trenches are used to integrate two vertical transistors connected in parallel with the main planar transistor. Thanks to the built-in trenches, the proposed manufacturing process increases the transistor width without impacting its footprint. The voltage/current characteristics of a planar MOS structure are compared with the features of the new Triple Gate Transistor. The new architecture provides an improved driving capability, with an on-state drain current twice as high as its equivalent standard MOS, combined with a lower threshold voltage, suitable for low-voltage applications. Finally, the gate oxide and junction reliability are validated over the operating voltage range.

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Section: Device Description and Manufacturingmentioning

confidence: 88%

A Novel Trench-Based Triple Gate Transistor With Enhanced Driving Capability

Gay

Marca

Aziza

et al. 2021

IEEE Electron Device Lett.

Self Cite

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show abstract

“…In this context, alternatives to classical planar MOSFETs have emerged in the last few years such as multiple-gate transistors [2], triple gate transistors [3], octagonal transistors [4], vertical MOS transistors [5], gate all around transistors [6], and the most relevant double gate SOI MOSFETs [7][8][9] and FinFETs [10][11][12][13] architectures. Alternatively, and mostly for passive devices, deep silicon trenches are used in different ways to increase integration density (insulators, sensors, or capacitors [14]).…”

Section: Introductionmentioning

confidence: 99%