A unified hot carrier degradation model for integrated lateral and vertical nDMOS transistors

Moens, P.; bosch, G. Van den; Groeseneken, G.; Bolognesi, D.

doi:10.1109/ispsd.2003.1225237

Cited by 13 publications

(1 citation statement)

References 5 publications

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“…6. As suggested in the literatures, 13,14) V fb and V th during the simulation are defined by V gs required to create a hole and electron density of 10 14 cm À3 . Since the interface states can only be probed when the sweeping pulse is higher than V th and lower than V fb , the measured I cp1 with V base ¼ V fb1 can probe the interface states from the channel region extending to location X 1 , as depicted in Fig.…”

Section: Resultsmentioning

confidence: 99%

Characteristics and Improvement in Hot-Carrier Reliability of Sub-Micrometer High-Voltage Double Diffused Drain Metal–Oxide–Semiconductor Field-Effect Transistors

Chen

Lee

et al. 2007

jjap

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The hot-carrier reliability of 12 V high-voltage n-channel double diffused drain metal-oxide-semiconductor (DDDMOS) field-effect transistors with various n-type double diffusion (NDD) implant dosages is investigated. A high NDD implant dosage results in a high substrate current; however, on-resistance (R on ) degradation is low. The damage location shifting toward the channel is responsible for this unexpected low R on degradation. Technology computer-aided design (TCAD) simulation and charge pumping measurements are carried out to identify the damage location. Our analysis results reveal that an increase in NDD dosage is effective for improving the reliability of the DDDMOS field-effect transistors.

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Section: Resultsmentioning

confidence: 99%