The effect of gate voltage on hot-carrier induced degradation in drain extended high-voltage metal-oxide-semiconductor (MOS) transistors with thick gate oxide (100nm) structure is presented. Different from the conventional low-voltage n-type MOS transistors, under a fixed drain voltage, devices stressed at a higher Vgs result in a greater maximum transconductance and on-resistance degradation. Under higher Vgs, the increase in channel hot-carrier injection is responsible for the greater Gm,max degradation. On the other hand, Kirk effect induced increase in drain avalanche hot carriers near the drain as well as higher electric field in the channel is responsible for the greater Ron degradation.

The hot-carrier reliability of 12 V high-voltage n-channel double diffused drain metal-oxide-semiconductor (DDDMOS) field-effect transistors with various n-type double diffusion (NDD) implant dosages is investigated. A high NDD implant dosage results in a high substrate current; however, on-resistance (R on ) degradation is low. The damage location shifting toward the channel is responsible for this unexpected low R on degradation. Technology computer-aided design (TCAD) simulation and charge pumping measurements are carried out to identify the damage location. Our analysis results reveal that an increase in NDD dosage is effective for improving the reliability of the DDDMOS field-effect transistors.

The hot-carrier-induced degradation in the high-voltage n-type lateral diffused metal-oxide-semiconductor (LDMOS) fieldeffect transistor is investigated. Interface state generation caused by hot-electron injection in the channel region is identified to be the main degradation mechanism. Since the gate current (I g ) consists mainly of the electron injection, I g correlates well with the hot-carrier lifetime of the device. The impact of varying device layout parameter on the performance and hot-carrier lifetime of the device are also evaluated. Such an analysis can achieve a better design of LDMOS transistors when considering both device performance and hot-carrier reliability.

The phenomenon and mechanism of hot-carrier-induced on-resistance (R on ) degradation for the n-type lateral diffused metaloxide-semiconductor (MOS) transistors stressed under various gate voltages (V g ) are investigated. R on degradation of the device is found to be attributed to the interface state (N it ) generation in the N À drift region. Moreover, R on degradation is almost identical for the devices stressed under medium V g and high V g , despite the fact that bulk current of the device is much greater at high V g bias. Such an anomalous R on degradation is suggested to be the result of two combined factors: the magnitude of impact ionization rate and N it generation efficiency.

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