Characteristics and Improvement in Hot-Carrier Reliability of Sub-Micrometer High-Voltage Double Diffused Drain Metal–Oxide–Semiconductor Field-Effect Transistors

Abstract

The hot-carrier reliability of 12 V high-voltage n-channel double diffused drain metal-oxide-semiconductor (DDDMOS) field-effect transistors with various n-type double diffusion (NDD) implant dosages is investigated. A high NDD implant dosage results in a high substrate current; however, on-resistance (R on ) degradation is low. The damage location shifting toward the channel is responsible for this unexpected low R on degradation. Technology computer-aided design (TCAD) simulation and charge pumping measurements are carried out to identify the damage location. Our analysis results reveal that an increase in NDD dosage is effective for improving the reliability of the DDDMOS field-effect transistors.

Characteristics and reliability of metal–oxide–semiconductor transistors with various depths of plasma-induced Si recess structure

“…6 that I Dlin degrades the most, suggesting that hot-carrier-induced damage is mainly located in the N − drift region. 25) The degradations of I Dsat , G mmax , and V t (less than a 3 mV shift, not shown) are much smaller than the I Dlin degradation. Thus, I Dlin degradation is chosen for judging the severity of hotcarrier-induced device degradation in the following analyses.…”

“…Several studies showed that the V G at which the maximum hot-carrierinduced device degradation is produced is that at which the peak I sub is produced. [24][25][26][27] Some other groups claimed that a higher V G value results in greater hot-carrier-induced device degradation. 28,29) Results in Fig.…”

Investigation of characteristics and hot-carrier reliability of high-voltage MOS transistors with various doping concentrations in the drift region

“…Because the devices are operated under high voltages, the off-state breakdown voltage is a key device parameter. Furthermore, hot-carrier induced device degradation, caused by the damage near the Si-SiO 2 interface and/or charge trapping in the gate oxide due to a high electric field near the drain end of the channel, is prone to developing into a serious reliability concern [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16]. For the design of n-type highvoltage MOS transistors, a lightly doped n − drift region next to the drain is usually employed to achieve the required breakdown voltage.…”

Analysis of high-voltage metal–oxide–semiconductor transistors with gradual junction in the drift region

“…The design of the drift region, such as by varying the doping concentration or the length of drift region, in high-voltage MOS transistors has been shown to produce a serious impact on V BD and hot-carrier-induced degradation of the device. [23][24][25][26][27][28] Our previous work has shown that high-voltage n-type MOS transistors using a gradual junction structure in the drift region have improved V BD without sacrificing device drivability. 29) In this study, high-voltage n-type MOS transistors with traditional and gradual junctions in the N − drift region are further investigated for devices with two different dimensions.…”