A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits

Chang, Henry; Charbon, Edoardo; Choudhury, Umakanta; Demіr, Alper; Felt, Eric; Liu, Edward; Malavasi, E.; Sangiovanni‐Vincentelli, Alberto; Vassiliou, Iasson

doi:10.1007/978-1-4419-8752-5

Cited by 96 publications

(62 citation statements)

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“…The general purpose optimization codes NPSOL [3] and MINOS are used in, e.g., [4,5]. Other CAD methods based on classical optimization methods, and extensions such as a minimax formulation, include OPASYN [6], OAC [7], and STAIC [8].…”

Section: Classical Optimization Methodsmentioning

confidence: 99%

GPCAD: a tool for CMOS op-amp synthesis

Hershenson¹,

Boyd²,

Lee³

1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)

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We present a method for optimizing and automating component and transistor sizing for CMOS operational amplifiers. We observe that a wide variety of performance measures can be formulated as posynomial functions of the design variables. As a result, amplifier design problems can be formulated as a geometric program, a special type of convex optimization problem for which very efficient global optimization methods have recently been developed. The synthesis method is therefore fast, and determines the globally optimal design; in particular the final solution is completely independent of the starting point (which can even be infeasible), and infeasible specifications are unambiguously detected.After briefly introducing the method, which is described in more detail in [1], we show how the method can be applied to six common op-amp architectures, and give several example designs.

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Section: Classical Optimization Methodsmentioning

confidence: 99%

GPCAD: a tool for CMOS op-amp synthesis

Hershenson¹,

Boyd²,

Lee³

1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)

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“…One of the major drawbacks of simulators is the high simulation time, especially for analogue complex circuits. The early SPICE simulators [3][4][5][6][7] are inadequate for the complexity of analogue microsystems, and can not simulate p.e. the phaselocked loop circuit because the voltage-controlled oscillator (VCO) frequency is much higher than the loop frequency [7].…”

Section: Principles For the Designmentioning

confidence: 99%

“…The second and third levels of representation consider second-order effects and noise influences. The major drawbacks of behavioural models listed in [6], namely in the simulation of frequency domain performance and noise performance [8], will be minimized by using the same mathematical approach. The multilevel behavioural models are most suitable for time-domain and parameter sweep analysis.…”

Section: Models Descriptionmentioning

confidence: 99%

Simulator for the receiver-end of an optical communication system

Pereira¹,

Martins

Rocha

et al. 2006

J3eA

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The merge of the computer and telephone networks that marked the end of the XX th century, will be followed by the triple integration of the computer, telephone and digital interactive television networks. The need for higher bandwidth in a global scale for the transmission of real-time video, will change the main role of optical communication systems from the high bit-rate international and intercontinental digital networks to local area networks, that can also benefict from the immunity of such systems to electromagnetic interference. Therefore it is necessary to increase the proficiency and broaden the experience of students of electrical engineering in optical systems, not just by higher workload on the cost and maintanence demanding equipments of university and high school optical labs. The computer simulator can constitute an answer for a portable, safe and low cost optical lab and it that can prepare students to the experimental procedures in an optical lab. This paper presents the framework of a functional simulator for the receiver of an optical communication system. The blocks of such systems are represented by behavioural multilevel models with input, output and internal parameters.

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“…A hierarchical approach to design automation involves breaking the complete design into subblocks and traversal of the design spaces in a hierarchical manner. The previously mentioned TDCD methodology (Figure 1a) may also be automated (Chang 1997). This approach is limited by the fact that produced designs are feasible but not optimal.…”

Section: Introductionmentioning

confidence: 99%

Hierarchical synthesis system with hybrid DLO‐MOGA optimization

Scanlan

Halton

2011

COMPEL - The International Journal for Computation and Mathematics in Electrical and Electronic Engineering

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ABSTRACT:Purpose-The purpose of this paper is to present a hierarchical circuit synthesis system with a Hybrid DLO-MOGA (Deterministic Local Optimization -Multi-Objective Genetic Algorithm) optimization scheme for system level synthesis.Design/methodology/approach-The use of a local optimization with a deterministic algorithm based on linear equations which is computationally efficient and improves the feasibility of designs, allows reduction in the number of MOGA generations required to achieve convergence. Originality/value-The use of a Hybrid DLO-MOGA optimization approach is a new approach to improve hierarchical circuit synthesis time while preserving accuracy. Paper Type-Research Paper

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A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits

Abstract: Electronic Services Library of Congress Cataloging-in-PublicationA top down eonstraint-driven design methodology for analog integrated cirellits / Henry Chang ... [et al.].p. em.Incllldes bibliographical referenees (p.

Cited by 96 publications

References 0 publications

GPCAD: a tool for CMOS op-amp synthesis

GPCAD: a tool for CMOS op-amp synthesis

Simulator for the receiver-end of an optical communication system

Hierarchical synthesis system with hybrid DLO‐MOGA optimization

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