A TIGBT With Floating n-Well Region for High &lt;italic&gt;dV/dt&lt;/italic&gt; Controllability and Low EMI Noise

Li, Ping; Cheng, Junji; Chen, Xingbi

doi:10.1109/led.2018.2803116

Cited by 13 publications

(10 citation statements)

References 11 publications

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“…However, the gate self‐charging effect would increase the d I CE /d t and d V KA /d t unintentionally. A simple expression of this effect is given as

C_{GC (OX)} \frac{d false(V_{normalFloat} - V_{normalGE} false)}{normaldt} = C_{GE} \frac{normald V_{GE}}{dt}

where C GC(OX) is the gate oxide component of C GC and V GE is the gate‐to‐emitter voltage [1–8]. Clearly, C GC(OX) has the same value in the proposed TIGBT and the conventional one.…”

Section: Device Structure and Operationmentioning

confidence: 99%

“…So with the same d V Float /d t , a higher C GE would lead to a lower d V GE /d t , which suppresses the gate self‐charging effect effectively. As a result, the controllability of the proposed TIGBT over d I CE /d t of TIGBT and d V KA /d t of FWD by gate resistance R G is improved [5–8].…”

Section: Device Structure and Operationmentioning

confidence: 99%

“…where C GC(OX) is the gate oxide component of C GC and V GE is the gate-to-emitter voltage [1][2][3][4][5][6][7][8]. Clearly, C GC(OX) has the same value in the proposed TIGBT and the conventional one.…”

mentioning

confidence: 99%

“…However, too small C GC would cause a high dV/dt noise especially when the free-wheeling diode (FWD) operates at a small current [5]. Suppressing the increase of the potential of the floating P-base region (V Float ) has been proven to be very effective, but some other electrical characteristics, such as the on-state voltage or the breakdown voltage, would be affected [5][6][7][8]. Some efforts have been made to increase the gate-to-emitter capacitance (C GE ) to optimise the ratio of C GC to C GE , but it also increases C GC [9].…”

mentioning

confidence: 99%

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TIGBT with emitter‐embedded gate for low turn‐on loss and low electro‐magnetic interference noise

Cheng

Chen

2018

Electron. lett.

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A trench insulated gate bipolar transistor (TIGBT) with emitterembedded gate is proposed. The emitter-embedded gate could increase the gate-to-emitter capacitance C GE without affecting the miller capacitance C GC. Therefore, the ratio of C GC to C GE is significantly reduced, which suppresses the gate self-charging effect effectively. As a result, an excellent controllability on the turn-on dI CE /dt of the TIGBT and the dV KA /dt of the freewheeling diode (FWD) is obtained. The simulation results based on a 1.2 kV TIGBT show that, in comparison with the conventional TIGBT, the lower limit of the reverse-recovery dV KA /dt of the FWD can be reduced by 91.2% and the turn-on loss could be reduced by 53.1% under the same dV KA /dt.

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“…However, the gate self‐charging effect would increase the d I CE /d t and d V KA /d t unintentionally. A simple expression of this effect is given as

C_{GC (OX)} \frac{d false(V_{normalFloat} - V_{normalGE} false)}{normaldt} = C_{GE} \frac{normald V_{GE}}{dt}

where C GC(OX) is the gate oxide component of C GC and V GE is the gate‐to‐emitter voltage [1–8]. Clearly, C GC(OX) has the same value in the proposed TIGBT and the conventional one.…”

Section: Device Structure and Operationmentioning

confidence: 99%

Section: Device Structure and Operationmentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

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TIGBT with emitter‐embedded gate for low turn‐on loss and low electro‐magnetic interference noise

Cheng

Chen

2018

Electron. lett.

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“…To suppress the turn-on dV/dt noise and reduce the E ON , improved FP structures with additional shunting resistance or hole current path were developed, but with higher V CEON . The micro p-body insulated gate bipolar transistor (IGBT), separate FP region or floating n-well structures can suppress the turn-on dV/dt noise without sacrificing V CEON , but at the cost of increased C GC [2,3]. To achieve lower C GC and Q G , the Fin p-body IGBT, side-gate IGBT, trench shielded gate structure etc.…”

mentioning

confidence: 99%

High performance floating p‐well carrier stored trench bipolar transistor with L‐shaped shield gates

et al. 2020

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A novel floating p-well carrier stored trench bipolar transistor with L-shaped shield gates (LSG-FP-CSTBT) is proposed in this Letter. The proposed device features combinatorial L-shaped shield gates with a thick oxide layer in the lower part of the trench. Numerical analysis results show that compared to the conventional FP-CSTBT, the shield effect provided by the LSGs not only improves the trade-off relationship between the on-state voltage drop (V CEON) and turn-off loss (E OFF), but also improves the trade-off relationship between the turn-on loss (E ON) of the device and reverse recovery dV AK /dt of the antiparallel freewheeling diode. Therefore, improved device performance and reduced electromagnetic interference noise are obtained.

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Analysis and optimization of the switching noise for Super-junction MOSFET in full bridge converter system

Tong

Liu

Zhao

et al. 2019

Solid-State Electronics

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A TIGBT With Floating n-Well Region for High <italic>dV/dt</italic> Controllability and Low EMI Noise

Cited by 13 publications

References 11 publications

TIGBT with emitter‐embedded gate for low turn‐on loss and low electro‐magnetic interference noise

TIGBT with emitter‐embedded gate for low turn‐on loss and low electro‐magnetic interference noise

High performance floating p‐well carrier stored trench bipolar transistor with L‐shaped shield gates

Analysis and optimization of the switching noise for Super-junction MOSFET in full bridge converter system

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