A Theory of Totally Self-Checking System Design

Smith, Stephen L.; Lam, Hak‐Keung

doi:10.1109/tc.1983.1676332

Cited by 49 publications

(14 citation statements)

References 16 publications

(15 reference statements)

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“…ASR(f) is related to the classical definitions of faultsecure and self-testing circuits [20] as follows. If the circuit is fault-secure with respect to fault f, then SDC(f) is empty and ASR(f) = 0.…”

Section: Circuit Protection By Error-detecting Codesmentioning

confidence: 99%

Cross-level protection of circuits against faults and malicious attacks

Tomashevich

Srinivasan

Foerg

et al. 2012

2012 IEEE 18th International on-Line Testing Symposium (IOLTS)

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Nanoscale electronics is increasingly affected by disturbances caused by radiation, noise and effects of statistical process variations. Moreover, deliberate injection of faults into cryptographic circuits is used by malicious attackers to perform cryptanalysis and gain access to sensitive information. Error-detecting codes are employed to protect circuits against such disturbances, and new advanced codes specifically designed to counter malicious attacks have recently been introduced. However, a number of logic gates in the circuit are not adequately protected by the error-detecting code, as faults affecting these gates escape detection with a relatively high probability. We introduce a cross-level protection solution, where a light-weight error-detecting code is combined with hardening of insufficiently protected gates using transistor resizing. Such gates are determined by FPGA-supported fault injection. A thorough electrical analysis is performed in order to modify the electrical parameters of these gates such that faults are highly unlikely. We report area and power overhead for a number of error-detecting codes. To the best of our knowledge, this is the first work which co-optimizes fault handling by information redundancy based on error-detecting codes and by hardening individual circuit elements.

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Section: Circuit Protection By Error-detecting Codesmentioning

confidence: 99%

Cross-level protection of circuits against faults and malicious attacks

Tomashevich

Srinivasan

Foerg

et al. 2012

2012 IEEE 18th International on-Line Testing Symposium (IOLTS)

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“…The unit U1 contains n -1 consistently connected gates AND. It receives operand A{1 ÷ n} and calculates the code B{1 ÷ n} by the formulas (2). The bit B{1} is attribute Z A of zero for the number A.…”

Section: Error Detection Circuits For Adder Multiplier and Dividermentioning

confidence: 99%

“…Such negative estimation of the logarithmic checking followed from high requirements to detection of an error. These requirements have developed in on-line testing in conditions of action of the exact calculation model based on the theory of self-checking circuits [2,3].…”

Section: Introductionmentioning

confidence: 99%

The logarithmic checking method for on-line testing of computing circuits for processing of the approximated data

Drozd¹,

Al-Azzeh²,

Drozd³

et al. 2004

Euromicro Symposium on Digital System Design, 2004. DSD 2004.

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In this paper we present logarithmic checking method for on-line testing of the fixed-point adder, multiplier and divider for processing of the approximated data. The check code as logarithmic estimation of fixed-point number is defined. Check equations, connected check codes of operands and result for operation of addition multiplication and division are proved. The method distinguishes errors, which are essential and non-essential for reliability of calculated results. It allows to lower rejection of authentic results and to raise results check reliability in processing of the approximated data in comparison with the residue checking.

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“…Q.E.D. [5] The following algorithm identifies which faults at the input lines might cause bidirectional error at the output. 3.…”

Section: Detection Of Bidirectional Faults At Input Linesmentioning

confidence: 99%

“…the circuits have to be self-checking. A self-checking circuit usually consists of a functional block that generates the encoded outputs, and a checker that checks the validity of the outputs [3][4][5]. Self-checking circuits that use m-out-of-n code [6] or Berger code [7] for output encoding, detect stuckat faults that cause single bit error or unidirectional multibit error.…”

Section: Introductionmentioning

confidence: 99%

Techniques for Self‐Checking Combinational LogicSynthesis

Busaba

Lala

1993

VLSI Design

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This paper presents techniques for designing arbitrary combinational circuits so that any single stuck-at fault will result in either single bit error or unidirectional multibit error at the output. If the outputs are encoded using Berger code or m-out-of-n code, then the proposed technique will enable on-line detection of faults in the circuit. An algorithm for indicating whether a certain fault at an input will create bidirectional error at the output is presented. An input encoding algorithm and an output encoding algorithm that ensure that every fault will either produce single bit error or unidirectional multibit error at the output are proposed. If there are no input fault which produces bidirectional error, no internal stuck-at fault will result in such an error irrespective of the way the circuit is implemented. Thus, only single bit or unidirectional multibit error will result in the presence of a fault in the circuit. The proposed techniques have been applied to MCNC benchmark circuits and the overhead is estimated.

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A Theory of Totally Self-Checking System Design

Cited by 49 publications

References 16 publications

Cross-level protection of circuits against faults and malicious attacks

Cross-level protection of circuits against faults and malicious attacks

The logarithmic checking method for on-line testing of computing circuits for processing of the approximated data

Techniques for Self‐Checking Combinational LogicSynthesis

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