A Study of Conventional and Junctionless MOSFET Using TCAD Simulations

Gupta, Neeraj; Patel, Janak B.; Raghav, Anubhav

doi:10.1109/acct.2015.51

Cited by 11 publications

(4 citation statements)

References 5 publications

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“…The junctionless dual gate MOSFET, immune to short-channel effects and possesses several unique features, is an outstanding alternative device architecture for CMOS technology [2]. The most prominent challenge in fabricating short-channel devices is forming source/channel and channel/drain junctions in typical MOSFETs [3]. Several advantageous qualities of junctionless MOSFETs include the absence of sharp junctions, which are challenging to create, a streamlined fabrication technique, and others [4].…”

Section: Introductionmentioning

confidence: 99%

Gate Engineered Ferroelectric Junctionless BioFET for Label-Free Detection of Biomolecules

Yadav

Rewari

Pandey

2023

Preprint

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A Gate Engineered Ferroelectric Junctionless BioFET is proposed and investigated for label-free detection of various biomolecules. A nanocavity is created by etching a part of the gate oxide material on the top and bottom of the device, which allows biomolecules to get immobilized. The immobilization of biomolecules in the cavity causes changes in electrostatic characteristics such as surface potential, input and output characteristics, transconductance, output conductance, gate capacitance, and cut-off frequency used as sensing metrics. The biosensor is also examined at different biomolecule concentrations, such as -1e12, 0, and 1e12. The transistor's sensitivity is then understood by looking at the fluctuation in threshold voltage, subthreshold swing, and switching ratio. Ferroelectric Junctionless BioFET and Gate Engineered Ferroelectric Junctionless BioFET performances have been compared. It has been found that the Gate Engineered Ferroelectric Junctionless BioFET shows the maximum improvement for protein (1202.4%, 111%, and 565%) and DNA (787.5%, 117.3%, and 600%). For ultrasensitive bio-sensing applications, the Gate Engineered Ferroelectric Junctionless BioFET is shown to be suitable.

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Section: Introductionmentioning

confidence: 99%

Gate Engineered Ferroelectric Junctionless BioFET for Label-Free Detection of Biomolecules

Yadav

Rewari

Pandey

2023

Preprint

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“…It was successfully fabricated at the Tyndall Institute by Colinge et al [4]. The major characteristic feature of this device is the absence of p-n junction which avoids the requirement of gradients in doping concentration [5]. Various analytical study of surface potential for junctionless transistor has also been done [6], [7].…”

Section: Introductionmentioning

confidence: 99%

Junctionless Accumulation Mode Ferroelectric FET (JAM-FE-FET) for High Frequency Digital and Analog Applications

Yadav

Rewari

Pandey

2022

Silicon

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In this paper, a Junctionless Accumulation Mode Ferroelectric Field Effect Transistor (JAM-FE-FET) has been proposed and assessed in terms of RF/analog specifications for varied channel lengths through simulations using TCAD Silvaco ATLAS simulator, using the Shockley-Read-Hall (SRH) recombination, ferro, Lombardi CVT, fermi and LK models. Major analog metrics like transconductance (gm), intrinsic gain (AV), output conductance (gd), and early voltage (VEA) are obtained for the JAM-FE-FET arrangement. The proposed structure shows an improvement in parameters like gm, Ion/Ioff, Av, TGF by 6.82%, 27.95%, 5.2%, 38.83% respectively. Further, frequency analysis of the proposed device is performed and several critical RF parameters like fT, TFP, GFP, and GTFP have been observed to be enhanced by 6.89%, 11.38%, 13.65%, 12.01% respectively. Thus, the Junctionless accumulation mode ferroelectric FET (JAM-FE-FET) arrangement has been found to have superior analog and RF performance when compared to Junctionless ferroelectric FET(JL-FE-FET). As a result, the JAM-FE-FET device presented here can be contemplated a good contender for applications in high-frequency systems.

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“…These new architectures using SOI MOSFET can be the possible alternative IOP Publishing doi:10.1088/1757-899X/1228/1/012021 2 to the bulk traditional MOSFETs. The SOI MOSFETs have the intrinsic advantage of diminished area of source and drain regions and absence of depletion region beneath the source and drain which reduces leakage current and junction capacitance making these devices an attractive option for reduced power reduced-voltage applications [3][4][5].…”

Section: Introductionmentioning

confidence: 99%

Performance Analysis of Fully Depleted SOI (FD-SOI) MOSFET Incorporating Dielectric Engineering

Kumar

Vashishath

Gupta

et al. 2022

IOP Conf. Ser.: Mater. Sci. Eng.

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This paper presents an efficacy of an FD SOI MOSFET structure in suppressing short channel effects is investigated through 2-Dimenional simulation on ATLAS Silvaco. The electrical comparison between Bulk MOSFET, FD-SOI MOSFET and FD-SOI MOSFET using high-k gate dielectric at 45nm technology has been carried out. The structures have been designed and study of threshold voltage, sub threshold slope, drain current (Ion), leakage current (Ioff), Ion/Ioff, transconductance has been done. The features offered by the new device structure are found to be better than the conventional bulk MOSFET. Aluminum Oxide (Al2O3) has been compared to SiO2 as dielectric material. As the dielectric constant of the materials increased, there is a reduction in the leakage current. It provides higher transconductance and better subthreshold slope, thus resulting in improvement of the device. A comparative analysis has been carried out among bulk MOSFET and SOI MOSFET using aluminum oxide, silicon oxide and silicon nitride as gate dielectric materials. Aluminum Oxide also provides higher drain current as compared to other dielectric materials presented in the paper. Thus, Aluminum Oxide is a good candidate as a dielectric for the future devices as compared to traditional oxides. The proposed device can be useful for low power applications.

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A Study of Conventional and Junctionless MOSFET Using TCAD Simulations

Cited by 11 publications

References 5 publications

Gate Engineered Ferroelectric Junctionless BioFET for Label-Free Detection of Biomolecules

Gate Engineered Ferroelectric Junctionless BioFET for Label-Free Detection of Biomolecules

Junctionless Accumulation Mode Ferroelectric FET (JAM-FE-FET) for High Frequency Digital and Analog Applications

Performance Analysis of Fully Depleted SOI (FD-SOI) MOSFET Incorporating Dielectric Engineering

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