A Scheduling Content-addressable Memory For ATM Space-division Switch Control

Akata, M.; Karube, S.-I.; Sakamoto, Takashi; Saito, Takayuki; Wakasugi, S.; Yoshida, Shinji; Matsuno, Hiroshi; Shibata, H.

doi:10.1109/isscc.1991.689145

Cited by 12 publications

(3 citation statements)

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“…Although general purpose CAM designs have been investigated [8], most CAMs manufactured today can be found in custom designs, often embedded in larger circuits. Many application-specific CAM configurations have been reported [5], [12]- [22]. The most significant functional differences among these configurations include the accessibility by address as well as content, match-and-update, resolution of multiple hits, synchronous or asynchronous operation, etc., resulting in diverse implementations of the CAM's peripheral circuitry.…”

Section: Content-addressable Memoriesmentioning

confidence: 99%

A framework for testing special-purpose memories

Sidorowicz¹,

Brzozowski

2002

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Current memory testing methods rely on fault models that are inadequate to accurately represent potential defects that occur in modern, often specialized, memories. To remedy this, the authors present a formal framework for modeling and testing special-purpose memories. Their approach uses three models: the transistor circuit, the event-sequence model, and finite-state machines. The methodology is explained using the example of a content-addressable memory (CAM). The fault model they describe comprises input stuck-at, transistor, and bridging faults. The authors show that functional tests can reliably detect all input stuck-at faults, most transistor faults (including all stuck-open faults), and about 50% of bridging faults. The remaining faults are detectable by parametric tests. A test of length 7 + 2 + 9 that detects all the reliably testable faults in an-word by-bit CAM is presented. A CAM test by Giles & Hunter is evaluated with respect to the input stuck-at faults. It is shown that this test fails to detect certain faults; it can be modified to achieve full coverage at the cost of increased length.

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Section: Content-addressable Memoriesmentioning

confidence: 99%

A framework for testing special-purpose memories

Sidorowicz¹,

Brzozowski

2002

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…Some of the external con#ict resolution algorithms are three-phase algorithm [4], scheduling CAM [5], and ring reservation [6]. Some of the external con#ict resolution algorithms are three-phase algorithm [4], scheduling CAM [5], and ring reservation [6].…”

Section: Introductionmentioning

confidence: 99%

Preventing internal and external conflicts in an input buffering reverse baseline ATM switch

Çam

2000

Int. J. Commun. Syst.

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“…This technique suffers from the same throughput problems as (1). Scheduling CAM [4]: As soon as a cell arrives at its input port, it sends a request to the arbitration processor, which employs a novel Scheduling Content Addressable Memory (SCAM). The SCAM determines the earliest possible cell interval in which the requested output is free, and the input port is instructed to buffer the cell until that time.…”

Section: A Basic Approachesmentioning

confidence: 99%

Distributed multicast contention resolution using content addressable FIFOs

Schultz¹,

Gulak²

Proceedings of ICC/SUPERCOMM'94 - 1994 International Conference on Communications

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Space switches suffer from external blocking because of output port contention. We review contention resolution methods used to avoid external blocking, and choose a solution based on ring reservation, resulting in an elegant and efficient mechanism requiring only nearest-neighbor communications. In addition to external blocking, space switches suffer from head-of-line (HOL) blocking, and we propose a means of contention resolution that alleviates HOL blocking without arbitration time overhead. This method makes use of a novel Content Addressable FIFO, and its design and operation are described in detail. Multiple latency priorities are supported, and we introduce an efficient means of supporting multicasts, using call-splitting in our single-cycle windowing environment.

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A Scheduling Content-addressable Memory For ATM Space-division Switch Control

Cited by 12 publications

References 0 publications

A framework for testing special-purpose memories

A framework for testing special-purpose memories

Preventing internal and external conflicts in an input buffering reverse baseline ATM switch

Distributed multicast contention resolution using content addressable FIFOs

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