A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications

Lucas, Amilcar do Carmo; Heithecker, Sven; Riiffer, P.; Ernst, Rolf; Ruckert, H.; Wischermann, G.; Gebel, K.; Fach, R.; Huther, W.; Eichner, S.; Scheller, G.

doi:10.1109/date.2006.244085

Cited by 7 publications

(5 citation statements)

References 12 publications

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“…This work will implement data storage to both on-and off-chip memories and provide interface for the pixel data required by the filter. FlexFilm [2] and Imagine [25] are the closest related research works at the present time. FlexFilm is a top-end multi-FPGA hardware/software architecture, for computation intensive, highresolution real-time digital film processing.…”

Section: Related Workmentioning

confidence: 97%

“…The goal for our IMEM-IMAPPER software tool is to manage (on-and off-chip) memory requirements and complexities and provide interfaces for the required data thus enabling designers to focus on core RTVPS algorithms. The synthesizable VHDL code generated by our tool is capable of performances in speed and video resolution comparable to Flex-Film [2] and Imagine [25].…”

Section: With Regards To Video Processing Platformsmentioning

confidence: 99%

“…Video processing systems required in the broadcast and postprocessing market are typically in the low-volume and high-cost segment. These are systems performing real-time high-resolution (2048 ¢ 2048@24 fps) high-performance computation with complex motion compensating spatiotemporal filters [2]. The trend is for the algorithm complexity to increase over time.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Automatic Generation of Spatial and Temporal Memory Architectures for Embedded Video Processing Systems

Norell

Lawal

O’Nils

2007

EURASIP Journal on Embedded Systems

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This paper presents a tool for automatic generation of the memory management implementation for spatial and temporal realtime video processing systems targeting field programmable gate arrays (FPGAs). The generator creates all the necessary memory and control functionality for a functional spatio-temporal video processing system. The required memory architecture is automatically optimized and mapped to the FPGAs' memory resources thus producing an efficient implementation in terms of used internal resources. The results in this paper show that the tool is able to efficiently and automatically generate all required memory management modules for both spatial and temporal real-time video processing systems.

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Section: Related Workmentioning

confidence: 97%

Section: With Regards To Video Processing Platformsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Automatic Generation of Spatial and Temporal Memory Architectures for Embedded Video Processing Systems

Norell

Lawal

O’Nils

2007

EURASIP Journal on Embedded Systems

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“…For instance, the first step in post-processing is often a film grain noise reduction. A promising algorithm for film grain reduction is composed by motion estimation, temporal Haar filters, and discrete wavelet transformations [3]. Such algorithm results into up to two thousand operations per pixel, and the intensive data-stream aspect is prominent.…”

Section: Driving Applicationsmentioning

confidence: 99%

The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform

Grasset¹,

Millet²,

Bonnot³

et al. 2010

Int J Parallel Prog

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Reconfigurable computing offers a wide range of low cost and efficient solutions for embedded systems. The proper choice of the reconfigurable device, the granularity of its processing elements and its memory architecture highly depend on This work was supported in part by the European Union in the 6th R&D Framework Program (MORPHEUS IST project, number 027342).A. Grasset (B) · P. Millet · P. Bonnot · S. Yehia 329 the type of application and their data flow. Existing solutions either offer fine grain FPGAs, which rely on a hardware synthesis flow and offer the maximum degree of flexibility, or coarser grain solutions, which are usually more suitable for a particular type of data flow and applications. In this paper, we present the MORPHEUS architecture, a versatile reconfigurable heterogeneous System-on-Chip targeting streaming applications. The presented architecture exploits different reconfigurable technologies at several computation granularities that efficiently address the different applications needs. In order to efficiently exploit the presented architecture, we implemented a complete software solution to map C applications to the reconfigurable architecture. In this paper, we describe the complete toolset and provide concrete use cases of the architecture.

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“…The beneſts are mentioned when using FPGAs in the context of image enhancement technology for display applications. The FlexFilm architecture [3] is used for computationally intensive digital ſlm processing. It is possible to process images with a resolution of 2048x2048 pixels in real-time.…”

Section: Introduction and Related Workmentioning

confidence: 99%

A comparison of embedded reconfigurable video-processing architectures

Claus

Stechele

Kovatsch

et al. 2008

2008 International Conference on Field Programmable Logic and Applications

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Using Field Programmable Gate Arrays (FPGAs) as accelerators for image or video processing operations and algorithms has gained increasing attention over the last few years. One reason for that is FPGAs are able to exploit both temporal and spatial parallelism. In this paper two platforms for FPGA-based real-time image and video processing are presented and compared against each other. With both of these platforms it is possible to update the physical resources during run-time by exploiting the dynamic partial reconſ-guration capabilities of Xilinx Virtex FPGAs. The analysis of both platforms with respect to their beneſts and drawbacks has led to the concept of an optimal FPGA-based dynamically and partially reconſgurable platform for real-time video and image processing.

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A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications

Cited by 7 publications

References 12 publications

Automatic Generation of Spatial and Temporal Memory Architectures for Embedded Video Processing Systems

Automatic Generation of Spatial and Temporal Memory Architectures for Embedded Video Processing Systems

The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform

A comparison of embedded reconfigurable video-processing architectures

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