A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization

Klein, Felipe; Leao, R.; Araújo, Guido; Santos, Luiz C. V. dos; Azevedo, Rodolfo

doi:10.1109/tvlsi.2009.2013627

Cited by 10 publications

(3 citation statements)

References 25 publications

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“…Err est = P simavg − P estavg P simavg • 100 (17) where P simavg and P estavg are described in Equations 12 and 16 respectively. A positive value states that we underestimate the average power.…”

Section: Resultsmentioning

confidence: 99%

“…More in detail, power estimation is based on a macro-modeling approach, in which a power model is created using pre-characterized power values [15]. This power pre-characterization can be computed at different abstraction levels [16,17]. The accuracy and the simulation run-time to obtain the characterization point will depend on the available information of the circuit structure and activity at the considered level (i.e., gate or transistor level).…”

Section: Power Estimationmentioning

confidence: 99%

See 1 more Smart Citation

Estimating dynamic power consumption for memristor-based CiM architecture

Traiola

Barbareschi

Bosio

2018

Microelectronics Reliability

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Nowadays, Computing-in-Memory (CiM) represents one of the most relevant solutions to deal with CMOS technological issues and several works have been proposed so far targeting front and back-end synthesis. However, a given CiM architecture can be synthesized depending on different parameters, leading to different implementations w.r.t. area, power consumption and performance. It is thus mandatory to have an evaluation framework to characterize the actual implementation depending on the above terms. This is even more important during the Design Exploration phase, in which many different implementations are explored to identify the best candidate w.r.t. the user requirements. In this work, we focus on the dynamic power consumption estimation of a given CiM implementation.Instead of resorting to a simulation-based power estimation, we propose an analytical approach that will dramatically speed up the estimation since no simulations are required. By comparing the proposed approach against the simulation-based method over a massive experimental campaign, we show that the accuracy of the estimation turns out to be very high.

show abstract

Section: Resultsmentioning

confidence: 99%

Section: Power Estimationmentioning

confidence: 99%

Estimating dynamic power consumption for memristor-based CiM architecture

Traiola

Barbareschi

Bosio

2018

Microelectronics Reliability

View full text Add to dashboard Cite

show abstract

“…The virtual platform includes a power model that provides a time-variant power consumption. With a virtual platform, it is possible to perform a functional verification, to evaluate the proposed architecture and to find the optimized low power architecture and the power mode [3,4,5].…”

Section: Virtual Platformmentioning

confidence: 99%

Low-power shared memory architecture power mode for mobile system-on-chip

Kim

Huh

Kim

et al. 2014

IEICE Electron. Express

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This paper presents dynamic power saving schemes for low power operation in the modem system shared memory architecture of mobile system-on-a-chip (SOC). Different power modes are considered to obtain the minimum power consumption in a modem operation. An electronic system level (ESL) virtual platform is implemented to verify the proposed scheme with real traffic data extracted from the actual phone. Experimental results show that the proposed method reduces the power consumption by 42% and 15% in 2G and 3G respectively.

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Precision tunable RTL macro-modelling cycle-accurate power estimation

Schafer

Wakabayashi

2011

IET Comput. Digit. Tech.

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A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization

Cited by 10 publications

References 25 publications

Estimating dynamic power consumption for memristor-based CiM architecture

Estimating dynamic power consumption for memristor-based CiM architecture

Low-power shared memory architecture power mode for mobile system-on-chip

Precision tunable RTL macro-modelling cycle-accurate power estimation

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