A method to determine the gate bias-dependent and gate bias-independent components of MOSFET series resistance from S-parameters

Rios, Emmanuel Torres; Torres‐Torres, Reydezel; Valdovinos-Fierro, G.; Gutierrez-D, Edmundo A.

doi:10.1109/ted.2006.870328

Cited by 31 publications

(20 citation statements)

References 8 publications

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“…However, these methods require accurate determination of L eff and complex calculations. In order to avoid all the aforementioned disadvantages, in this work we extract the series resistances from impedances of a MOSFET two port system [13]. During the extraction, the device is biased in the strong inversion region with V ds =0V where the transadmittances and intrinsic gate-substrate capacitance, C gbi can be neglected.…”

Section: Series Resistance Extractionmentioning

confidence: 99%

Series resistance in vertical MOSFETs with reduced drain/source overlap capacitance

Tan

Hall

Buiu

et al. 2008

2008 9th International Conference on Ultimate Integration of Silicon

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In this work we investigate the series resistances in vertical MOSFETs incorporating the fillet local oxidation (FILOX) structure that serves to reduce the gate to drain/source overlap capacitances. The series resistances are modeled analytically and the important influencing factors, namely gate bias dependence and the asymmetric nature of the device, are identified. We extract by simulation, R d and R s from devices with different FILOX thicknesses, employing an impedance method often used in RF characterisation. We identify the trade-off whereby thickening the FILOX first causes an increase of the cut-off frequency f T , until the on-current I on becomes limited by increasing series resistances and f T therefore reduces. The results indicate a thickness of 40nm FILOX for maximum f T . We also investigate the influence of process conditions on low series resistances, namely time of rapid thermal annealing RTA and angle of implantation.

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Section: Series Resistance Extractionmentioning

confidence: 99%

Series resistance in vertical MOSFETs with reduced drain/source overlap capacitance

Tan

Hall

Buiu

et al. 2008

2008 9th International Conference on Ultimate Integration of Silicon

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“…where is a parameter that takes into account the bias-dependent resistance due to the LDD regions under the gate [21]; is the gate-source voltage; is the threshold voltage; is the bias-independent resistance, attributed to the HDD region and the part of the LDD region that is not under the gate; and the subscripts and denote the source and drain regions, respectively. Equations (12) and (13) allow the behavior of series parasitic resistances in microwave MOSFETs to be accurately modeled.…”

Section: Geometry Of a Microwave Mosfetmentioning

confidence: 99%

Modeling the Impact of Multi-Fingering Microwave MOSFETs on the Source and Drain Resistances

Zarate-Rincon

Murphy‐Arteaga

Torres‐Torres

et al. 2014

IEEE Trans. Microwave Theory Techn.

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Modern MOSFETs operated at high frequencies are designed and fabricated using a multi-fingered structure to enhance performance, especially to reduce gate resistance. However, even though the layout-dependent effect of other parasitics, such as that related to the source and drain resistances, is becoming more important, it has not been extensively investigated at high frequencies. In this paper, source and drain resistances are experimentally determined and analyzed for several microwave MOSFETs to characterize their corresponding dependence on the layout. This allows for the quantification and modeling of the impact of the device's geometry on its parasitic extrinsic parameters. Physically based closed-form equations are proposed here to accurately represent -parameters of MOSFETs operating at microwave frequencies with layouts considering different numbers of gate fingers, and grouping devices in cells with multiple source and drain junctions. The proposed models are compatible with SPICE-like circuit simulators, and an excellent model-experiment correlation is obtained when using the proposed scalable equations to represent different geometry MOSFETs up to 60 GHz.

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“…By this approach, efforts were made for the highest degree of validation that one can expect from a simulation-based research. MOSFETs [5], the proposed NQS model has been comprised in the components of the gate-bias-dependent S/D resistances (R si /R di ) and independent S/D resistances (R se /R de ) that are extracted from a known method [6]. R elect can be extracted by a separate extraction method for gate resistance components [7].…”

Section: Introductionmentioning

confidence: 99%

Small-Signal Modeling of Gate-All-Around (GAA) Junctionless (JL) MOSFETs for Sub-millimeter Wave Applications

Lee¹,

Cho²,

Park³

et al. 2012

JSTS:Journal of Semiconductor Technology and Science

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A method to determine the gate bias-dependent and gate bias-independent components of MOSFET series resistance from S-parameters

Cited by 31 publications

References 8 publications

Series resistance in vertical MOSFETs with reduced drain/source overlap capacitance

Series resistance in vertical MOSFETs with reduced drain/source overlap capacitance

Modeling the Impact of Multi-Fingering Microwave MOSFETs on the Source and Drain Resistances

Small-Signal Modeling of Gate-All-Around (GAA) Junctionless (JL) MOSFETs for Sub-millimeter Wave Applications

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