2019
DOI: 10.1109/jeds.2019.2923208
|View full text |Cite
|
Sign up to set email alerts
|

A High Performance Operational Amplifier Using Coplanar Dual Gate a-IGZO TFTs

Abstract: We fabricate an operational amplifier (op-amp) composed with the coplanar amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). The circuit consisted of 19-TFTs and designed on a glass substrate in both dual gate (DG) and single gate (SG) structure for performance evaluation. Having the yield of a total voltage gain (A v ) of 23.5 dB, a cutoff frequency (f c ) of 500 kHz, a unit gain frequency (f ug ) of 2.37 MHz, gain-bandwidth product (GBWP) of 7500 kHz, a slew rate (up/down) of (2.1/1.2… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2

Citation Types

1
16
0

Year Published

2020
2020
2023
2023

Publication Types

Select...
6
1
1

Relationship

2
6

Authors

Journals

citations
Cited by 40 publications
(17 citation statements)
references
References 28 publications
1
16
0
Order By: Relevance
“…From the frequency response of the circuit, unity gain frequency (fug) of 215 kHz is reported which is higher than [9, 2224]. However, a higher value of fug is reported in [8, 11] due to advancement in technology and fabrication process. While [8] uses dual gate technology, the circuit reported in [11] employs a self‐alignment fabrication process, which decreases overlap capacitances of the device.…”
Section: Resultsmentioning
confidence: 99%
See 2 more Smart Citations
“…From the frequency response of the circuit, unity gain frequency (fug) of 215 kHz is reported which is higher than [9, 2224]. However, a higher value of fug is reported in [8, 11] due to advancement in technology and fabrication process. While [8] uses dual gate technology, the circuit reported in [11] employs a self‐alignment fabrication process, which decreases overlap capacitances of the device.…”
Section: Resultsmentioning
confidence: 99%
“…However, a higher value of fug is reported in [8, 11] due to advancement in technology and fabrication process. While [8] uses dual gate technology, the circuit reported in [11] employs a self‐alignment fabrication process, which decreases overlap capacitances of the device. Furthermore, the circuit reported in [11] employs aluminium oxide (normalAl2O3) as gate insulator, which offers a high dielectric constant and hence capable of operating at lower power supply voltage.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…It is noted that the quality of SiO 2 depends on its substrate process temperature; the density and leakage through SiO 2 and electrical breakdown voltage could be improved by increasing the deposition temperature of SiO 2 . The buffer SiO 2 of coplanar structures and the gate dielectric SiO 2 of back-channel-etch (BCE) structures are usually deposited at 300 to 400 • C by plasma-enhanced chemical vapor deposition (PECVD) for display applications [7,8]. The coplanar structure of IGZO TFTs has the advantage of negligible overlap capacitance between the gate and source/drain electrodes, and thus, the RC (resistance-capacitance product) delay can be remarkably reduced for display applications [5][6][7] [9][10][11].…”
Section: Introductionmentioning
confidence: 99%
“…The Monte Carlo method was used for the circuit simulation to account for device variability. The Monte Carlo method ( Figure 2i We compared the performance of the present CNT op-amp with those of various differential amplifiers [32][33][34][35][36][37][38][39] and op-amps: [40][41][42][43][44][45][46] single-polarity TFTs on a flexible substrate [32][33][34][35][36][37][38][39][40][41][42] or glass substrate [43][44][45][46][47] and with oxide semiconductors, [32][33][34][40][41][42][43][44][45]47 organic semiconductors, [35][36][37][38][39] or amorphous Si 46 . The prese...…”
mentioning
confidence: 99%