A GeSbTe phase-change memory cell featuring a tungsten heater electrode for low-power, highly stable, and short-read-cycle operations

Oxygen-doped gesbte phase-change memory cells featuring 1.5 V/100-μA standard 0.13μm CMOS operations

“…The width of the reset pulse was 100 ns and that of the set pulse was 10 µs. High resistance for the reset state, which was more than 1x 10 8 ohm, was obtained with a word-line voltage (V WL ) of 1.2 V, and a bit-line voltage (V BL ) of 1 V. The V BL for reset operation was found to be about 1.2 V, which was lower than the value of 2.8 V in our previous report (7). The current-voltage curves for a PCM cell are plotted in Fig.…”

Contact resistance measurement structures for high frequencies

“…Phase change memory cells have been demonstrated for very fast material switching times down to 1 ns for both set and reset operation [4]. Memory cells with a read-time of 2 ns have been reported to allow up to 200 MHz data throughput [3]. Furthermore, research is progressing to improve the electrical switching speed of PCM which has been demonstrated to switch with pico-second laser pulses [5].…”

“…The state of the memory cell is read by checking the phase of the PCM layer using again pulsed electrical resistance measurement [2]. Typically set, reset or read operation are achieved by different electrical pulses of nano-second duration [2] [3]. Phase change memory cells have been demonstrated for very fast material switching times down to 1 ns for both set and reset operation [4].…”

Progress on design and demonstration of the 4MB chalcogenide-based random access memory

“…Commercial interest in phase-change memories accelerated in 2000, and now includes separate developments in Ovonic Unified Memory (OUM) and Phase-change Random Access Memory (PRAM) at Intel [9]- [11], ST Microelectronics, Samsung [12]- [16], and Hitachi [17].…”