A fully integrated distributed active transformer based power amplifier in 0.13 &amp;#x00B5;m CMOS technology

Khan, Hashim Raza; Sajid, U.; Kanwal, S.; Zafar, Faiza; Wahab, Q.

doi:10.1109/siecpc.2013.6550995

Cited by 3 publications

(3 citation statements)

References 17 publications

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“…This means that the input signal has varying power levels which the PA needs to maintain its high efficiency at. With higher frequencies, the efficiency of SMPAs is limited due to the device parasitics and the limited switching speed [5].…”

Section: Introductionmentioning

confidence: 99%

A 28-GHz Cascode Inverse Class-D Power Amplifier Utilizing Pulse Injection in 22-nm FDSOI

et al. 2020

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Current Mode Class-D (CMCD) Power Amplifiers are of particular interest in outphasing transmitters or Doherty configuration. This is because the output capacitance can be absorbed in the RLC output matching network and 100% theoretical efficiency. In this paper, a 28 GHz current mode (inverse) Class-D power amplifier was simulated, implemented, and measured in 22nm FDSOI. In order to overcome the breakdown voltages of the devices, the amplifier employs a stacked topology, which enables higher output powers and efficiency. The stacked transistors are also pulse injected to further increase the efficiency. Measurement results shows a peak PAE of 46%, peak drain efficiency (DE) of 71% and a saturated output power of 19 dBm. The implemented CMCD PA reports the best performance in literature compared to other CMOS based CMCD PAs.INDEX TERMS Current mode class-D, FDSOI CMOS, high efficiency, power added efficiency (PAE), power amplifier (PA), stacking.

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Section: Introductionmentioning

confidence: 99%

A 28-GHz Cascode Inverse Class-D Power Amplifier Utilizing Pulse Injection in 22-nm FDSOI

et al. 2020

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“…Unfortunately, efficiency and supply voltage represent a trade-off in switching-mode power amplifiers (PAs). Several techniques have been proposed for improving efficiency at low supply voltages [6][7][8][9][10][11]. The fully integrated PAs with a power combiner, such as multiple LC baluns [6], a transformer [7], and a distributed active transformer [8,9], were proposed to boost the power added efficiency (PAE) at low supply voltages.…”

Section: Introductionmentioning

confidence: 99%

“…Several techniques have been proposed for improving efficiency at low supply voltages [6][7][8][9][10][11]. The fully integrated PAs with a power combiner, such as multiple LC baluns [6], a transformer [7], and a distributed active transformer [8,9], were proposed to boost the power added efficiency (PAE) at low supply voltages. PAE is the ratio of the produced signal power (the difference between the output and input power) and the dc power consumption.…”

Section: Introductionmentioning

confidence: 99%

A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

Kurniawan

Yoshimasu

2019

Electronics

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This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parallel to the output load. Therefore, the flattened drain current and voltage waveforms are generated, which in turn reduce the overlapping and the dc power consumption significantly. In addition, a 0.5-V back-gate voltage is applied to the primary switching transistor to realize the low-voltage operation. At 1 V of supply voltage, the proposed PA has achieved a power added efficiency (PAE) of 34.5% and a saturated output power of 10.1 dBm.

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A wideband class E PA with more than 40% PAE and over 800 MHz bandwidth

Gunturi

Kotecki

2014

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

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A Power Amplifier (PA) for wireless applications operating between 2.6 GHz and 3.4 GHz with power added efficiency (PAE) of more than 40% is presented in this paper. By varying the width of the PA transistor, the performance of the PA in terms of PAE and stability is studied. The PAE is more than 40% for the bandwidth of 800 MHz. The input matching circuit is implemented using on-chip transmission lines and the input reflection coefficient is less than -8dB over the bandwidth. The output power and PAE are 15.5dBm and 52% respectively at 2.7 GHz. The power amplifier is implemented in 180nm CMOS technology and the total area is approximately equal to 1mm 2 . The circuit includes electrostatic discharge (ESD) protection.

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A fully integrated distributed active transformer based power amplifier in 0.13 µm CMOS technology

Cited by 3 publications

References 17 publications

A 28-GHz Cascode Inverse Class-D Power Amplifier Utilizing Pulse Injection in 22-nm FDSOI

A 28-GHz Cascode Inverse Class-D Power Amplifier Utilizing Pulse Injection in 22-nm FDSOI

A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

A wideband class E PA with more than 40% PAE and over 800 MHz bandwidth

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