2019
DOI: 10.3390/electronics8010069
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A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

Abstract: This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parall… Show more

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Cited by 4 publications
(3 citation statements)
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“…Instead of using a single transistor, 2 switching n-channel MOS (nMOS) transistors were used to boost the performance of PA. It was succeeded 34.5% PAE at 0.18-m CMOS technology [12]. When the capacitive feedback model was used, PAE level increased to 63% [13].…”
Section: Introductionmentioning
confidence: 94%
“…Instead of using a single transistor, 2 switching n-channel MOS (nMOS) transistors were used to boost the performance of PA. It was succeeded 34.5% PAE at 0.18-m CMOS technology [12]. When the capacitive feedback model was used, PAE level increased to 63% [13].…”
Section: Introductionmentioning
confidence: 94%
“…In addition to the research in transistors and memory devices, this issue has collected important research on solar cells based on ZnO/Si heterojunctions [13], Bi-doped and Bi-Er co-doped optical fibers [14], high-performance graphene electrolyte double-layer capacitors [15], quantum-dot and sample-grating semiconductor optical amplifiers [16], a transmission method to determine the complex conductivity of thin strips [17], and a high-efficiency CMOS power amplifier with a dual-switching transistor [18].…”
Section: The Current Research Trendsmentioning
confidence: 99%
“…The power supply voltage in these designs is much higher than 1 V. In addition, a two-way power combining is utilized in these designs, which results in large die size occupation. The CMOS PA reported in [27] uses 1 V power supply and achieves a much higher peak PAE of 34.5%, but it works in switching mode. Thus, it can hardly supports modern modulation schemes, which require high linearity.…”
mentioning
confidence: 99%