A Two-Stage X-Band 20.7-dBm Power Amplifier in 40-nm CMOS Technology

Abstract

For higher integration density, X-band power amplifiers (PAs) with CMOS technology have been widely discussed in recent publications. However, with reduced power supply voltage and device size, it is a great challenge to design a compact PA with high output power and power-added efficiency (PAE). In the proposed design, a 40-nm standard CMOS process is used for higher integration with other RF building blocks, compared with other CMOS PA designs with larger process node. Transistor cells are designed with neutralization capacitors to increase stability and gain performance of the PA. As a trade-off among gain, output power, and PAE, the transistor cells in driving stage and power stage are biased for class A and class AB operation, respectively. Both transistor cells consist of two transistors working in differential mode. Furthermore, transformer-based matching networks (TMNs) are used to realize a two-stage X-band CMOS PA with compact size. The PA achieves an effective conductivity (EC) of 117.5, which is among the highest in recently reported X-band PAs in CMOS technology. The PA also attains a saturated output power (Psat) of 20.7 dBm, a peak PAE of 22.4%, and a gain of 25.6 dB at the center frequency of 10 GHz under a 1 V supply in 40-nm CMOS.

A 21.6dBm CMOS power amplifier using a compact high-k output transformer for X-band application

“…Ref. [15] showed a better EC performance, while our work had advantages in peak output power as well as wide-band performance. In addition, PA in this work occupied a smallest core-area among the listed ones, and the compactly designed TF networks contributed a lot.…”

“…Many of them were based on a high supply voltage (2.8~3.6 V), and only ref. [15,16] reported PAs operating on a lower power supply (1.0/1.2 V). The fabricated PA in this work exhibited higher EC (Psat/V 2 sup) performance than most of listed works.…”

“…Recently, researches on CMOS PA have been intensified. [11,12,13,14,15,16,17,18] The integration can be greatly improved via CMOS technology, and the power consumption as well as fabrication cost can be reduced simultaneously. However, the lower operating voltage of CMOS PA limits its output power.…”