No abstract

No abstract

No abstract

No abstract

A Power Amplifier (PA) for wireless applications operating between 2.6 GHz and 3.4 GHz with power added efficiency (PAE) of more than 40% is presented in this paper. By varying the width of the PA transistor, the performance of the PA in terms of PAE and stability is studied. The PAE is more than 40% for the bandwidth of 800 MHz. The input matching circuit is implemented using on-chip transmission lines and the input reflection coefficient is less than -8dB over the bandwidth. The output power and PAE are 15.5dBm and 52% respectively at 2.7 GHz. The power amplifier is implemented in 180nm CMOS technology and the total area is approximately equal to 1mm 2 . The circuit includes electrostatic discharge (ESD) protection.