A fully integrated 96GHz 2&amp;#x00D7;2 focal-plane array with On-Chip antenna

Wang, Chuncheng; Chen, Zhiming; Yao, Hsin-Cheng; Heydari, Payam

doi:10.1109/rfic.2011.5940668

Cited by 5 publications

(2 citation statements)

References 6 publications

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“…2 [12]. Each RX employs a local frequency tripler whose input is fed by a central on-chip 32 GHz PLL shared among the four RXs with the PLL's output placed at the center of the chip.…”

Section: System Architecturesmentioning

confidence: 99%

A BiCMOS W-Band 2×2 Focal-Plane Array With On-Chip Antenna

Chen

Wang

Yao

et al. 2012

IEEE J. Solid-State Circuits

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This paper presents a W-band 2 2 focal-plane array (FPA) for passive millimeter-wave imaging in a standard 0.18 m SiGe BiCMOS process ( GHz). The FPA incorporates four Dicke-type receivers representing four imaging pixels. Each receiver employs the direct-conversion architecture consisting of an on-chip slot folded dipole antenna, an SPDT switch, a low noise amplifier, a single-balanced mixer, an injection-locked frequency tripler (ILFT), an IF variable gain amplifier, a power detector, an active bandpass filter and a synchronous demodulator. The LO signal is generated by a shared Ka-band PLL and distributed symmetrically to four local ILFTs. The measured LO phase noise is at 1 MHz offset from the 96 GHz carrier. This imaging receiver (without antenna) achieves a measured average responsivity and noise equivalent power of 285 MV/W and 8.1 , respectively, across the 86-106 GHz bandwidth, which results a calculated NETD of 0.48 K with a 30 ms integration time. The system NETD increases to 3 K with on-chip antenna due to its low efficiency at W-band. MMW images have been generated in transmission mode. This work demonstrates the highest integration level of any silicon-based systems in the 94 GHz imaging band.

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“…2 [12]. Each RX employs a local frequency tripler whose input is fed by a central on-chip 32 GHz PLL shared among the four RXs with the PLL's output placed at the center of the chip.…”

Section: System Architecturesmentioning

confidence: 99%

A BiCMOS W-Band 2×2 Focal-Plane Array With On-Chip Antenna

Chen

Wang

Yao

et al. 2012

IEEE J. Solid-State Circuits

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“…One way to reduce the exclusive use area of the antenna and the low fill requirement is to use EM duality [17] to create a slot dual of a wire antenna, such as a slot dipole or folded slot dipole [18], as shown in Fig. 1.…”

Section: Introductionmentioning

confidence: 99%

An Integrated Slot-Ring Traveling-Wave Radiator

Bowers

Safaripour

Hajimiri

2015

IEEE Trans. Microwave Theory Techn.

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Electromagnetic duality is used to design a multi-port traveling-wave slot-ring antenna with on-chip driver circuitry to create a fully integrated radiator. By creating a slot version of the multi-port driven antenna, the required exclusive use area of the antenna is significantly decreased, while still being able to perform impedance matching, power combining, and power transfer off chip through electromagnetic radiation in a single step. The driver core consists of an oscillator followed by three amplification stages. A split path inductor design was utilized to reduce the radiator's dependence on process variation in the metal stack while ensuring proper isolation between the four quadrature paths. The slot radiator has a simulated antenna efficiency of 39% and a measured single-element effective isotropic radiated power of 6.0 dBm with a total radiated power of 1.3 dBm at 134.5 GHz. Index Terms-Antenna theory and design, CMOS integrated circuits, electromagnetic (EM) simulation, integrated microwave circuits, integrated radiators, millimeter-wave silicon RF integrated circuits (RFICs), on-chip antennas.

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