A Flexible Framework for Fast Multi-objective Design Space Exploration of Embedded Systems

Palermo, Gianluca; Silvano, Cristina; Zaccaria, Vittorio

doi:10.1007/978-3-540-39762-5_31

Cited by 26 publications

(37 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…Several efforts also have developed a modular interfacebased system-level MP-SoC DSE framework [15,16]. In both cases, different search algorithms can be plugged in, but the resulting DSE is limited in terms of target MP-SoC platforms that can be explored.…”

Section: Related Workmentioning

confidence: 99%

NASA: A generic infrastructure for system-level MP-SoC design space exploration

Jia

Pimentel

Thompson

et al. 2010

2010 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia

View full text Add to dashboard Cite

Abstract-System-level simulation and design space exploration (DSE) are key ingredients for the design of multiprocessor system-on-chip (MP-SoC) based embedded systems. The efforts in this area, however, typically use ad-hoc software infrastructures to facilitate and support the system-level DSE experiments. In this paper, we present a new, generic systemlevel MP-SoC DSE infrastructure, called NASA (Non Ad-hoc Search Algorithm). This highly modular framework uses welldefined interfaces to easily integrate different system-level simulation tools as well as different combinations of search strategies in a simple plug-and-play fashion. Moreover, NASA deploys a so-called dimension-oriented DSE approach, allowing designers to configure the appropriate number of, possibly different, search algorithms to simultaneously co-explore the various design space dimensions. As a result, NASA provides a flexible and re-usable framework for the systematic exploration of the multi-dimensional MP-SoC design space, starting from a set of relatively simple user specifications. To demonstrate the distinct aspects of NASA, we also present several DSE experiments in which we, e.g., compare NASA configurations using a single search algorithm for all design space dimensions to configurations using a separate search algorithm per dimension. These experiments indicate that the latter multi-dimensional coexploration can find better design points and evaluates a higher diversity of design alternatives as compared to the more traditional approach of using a single search algorithm for all dimensions.

show abstract

Section: Related Workmentioning

confidence: 99%

NASA: A generic infrastructure for system-level MP-SoC design space exploration

Jia

Pimentel

Thompson

et al. 2010

2010 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia

View full text Add to dashboard Cite

show abstract

“…Among the most recent heuristics for power/performance architectural exploration we can find [6]- [8]. In [6], the authors compare the Pareto Simulated Annealing, the Pareto Reactive Taboo Search and Random Search exploration to identify energy-performance tradeoffs for a parametric super-scalar architecture running a set of multimedia kernels. In [7], a combined Genetic-Fuzzy system approach is proposed.…”

Section: Introductionmentioning

confidence: 99%

“…The exploration problem is converted to a Markov Decision Process (MDP) problem whose solution corresponds to the sequence of optimal transformations to be applied to the platform. The requisite of domain knowledge is the main difference with respect to the proposals in [6] [7] Metamodel assisted optimization such as the one presented in this paper has been deeply studied by researchers in last decade [2], [9]- [12]. In particular, in [1], [2], the authors propose two different methods for exploiting metamodel uncertainty information obtained from a Kriging model [13].…”

Section: Introductionmentioning

confidence: 99%

Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip

Mariani

Palermo

Silvano

et al. 2009

2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools

Self Cite

View full text Add to dashboard Cite

Abstract-Multi-processor Systems-on-chip are currently designed by using platform-based synthesis techniques. In this approach, a wide range of platform parameters are tuned to find the best trade-offs in terms of the selected system figures of merit (such as energy, delay and area). This optimization phase is called Design Space Exploration (DSE) and it generally consists of a Multi-Objective Optimization (MOO) problem.The design space of a Multi-processor architecture is too large to be evaluated comprehensively. So far, several heuristic techniques have been proposed to address the MOO problem, but they are characterized by low efficiency to identify the Pareto front. In this paper, we address the MPSoC DSE problem by using an NSGA-II modified to be assisted by an Artificial Neural Network (ANN). In particular we exploit statistical methods to compute the prediction confidence intervals for the ANN approximations. These information are adopted in the evolution control strategy in order to carefully select which individuals should be simulated.Experimental results show that the proposed techniques is able to reduce the simulations needed for the optimization without decreasing the quality of the obtained Pareto Front.Results are compared with state of the art techniques to demonstrate that optimization time due to simulation can be speed up by adopting statistical methods during evolution control.

show abstract

“…In our previos works [11,10], Pareto Simulated Annealing and the Random Search Pareto have been proposed to evaluate energy-delay tradeoffs for a set of multimedia kernels.…”

Section: Introductionmentioning

confidence: 99%

Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration

Palermo

Silvano

Zaccaria

2008

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools

Self Cite

View full text Add to dashboard Cite

Platform-based design represents the most widely used approach to design System-On-Chip (SOC) applications. In this context, the Design Space Exploration (DSE) phase consists of optimally configure a parameterized SOC platform in terms of system-level requirements depending on the target application. In this paper, we introduce the Discrete Particle Swarm Optimization methodology (DPSO) for supporting the DSE of an hardware platform. The proposed technique aims at efficiently profiling the target application and deriving an approximated Pareto set of system configurations with respect to the selected figures of merit. Once the approximated Pareto set has been built, the designer can quickly select the best system configuration satisfying the constraints. Experimental results show that the proposed DPSO technique can speed up the design space exploration time up to 5X with an accuracy of up to 70% with respect to a full search exploration for the selected benchmarks 1 .

show abstract

A Flexible Framework for Fast Multi-objective Design Space Exploration of Embedded Systems

Cited by 26 publications

References 15 publications

NASA: A generic infrastructure for system-level MP-SoC design space exploration

NASA: A generic infrastructure for system-level MP-SoC design space exploration

Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip

Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration

Contact Info

Product

Resources

About