A Deep Study of Resistance Switching Phenomena in TaO_x ReRAM Cells: System‐Theoretic Dynamic Route Map Analysis and Experimental Verification

Abstract

two significant directions. First, it results in serious heat issues, which may jeopardize the life-time of circuits, and create dangerous positive feedback effects in the thermally-activated physical mechanisms, underlying the operating principles of certain devices. Concurrently, it leads to an inevitable upsurge in power consumption across a CMOS chip, which sheds shadows on the reliability of Dennard's law, [2] and prevents further increases in the clock frequency. Taking also into account the extremely-high costs associated with the production of cutting-edge sub-10 nm chips, semiconductor manufacturers are questioning whether keeping the aggressive transistor downscaling rate, dictated by Moore's law, is still profitable. [3] An additional aspect, which limits the maximum information management rate, is related to the classical von Neumann architecture of state-of-the-art computers, in which the physical separation between central processing unit and data storage system causes inevitable delays in the accomplishment of memory and computing tasks. Besides the proposal of clever ideas to resolve some of these open issues, for example, exploiting the third vertical direction to increase the transistor count on the available chip area, and developing multi-core computing machines with distributed memory to increase the data processing rate, device engineers are devoting considerable efforts in the search for special materials, allowing to developThe multidisciplinary field of memristors calls for the necessity for theoreticallyinclined researchers and experimenters to join forces, merging complementary expertise and technical know-how, to develop and implement rigorous and systematic techniques to design variability-aware memristor-based circuits and systems. The availability of a predictive physics-based model for a memristor is a necessary requirement before commencing these investigations. An interesting dynamic phenomenon, occurring ubiquitously in non-volatile memristors, is fading memory. The latter may be defined as the appearance of a unique steady-state behavior, irrespective of the choice of the initial condition from an admissible range of values, for each stimulus from a certain family, for example, the DC or the purely-AC periodic input class. This paper first provides experimental evidence for the emergence of fading memory effects in the response of a TaO x redox-based random access memory cell to inputs from both of these classes. Leveraging the predictive capability of a physics-based device model, called JART VCM v1, a thorough system-theoretic analysis, revolving around the Dynamic Route Map graphic tool, is presented. This analysis allows to gain a better understanding of the mechanisms, underlying the emergence of history erase effects, and to identify the main factors, that modulate this nonlinear phenomenon, toward future potential applications.

Recent Advances and Future Prospects for Memristive Materials, Devices, and Systems

“…Thus, Δ x = 0 and eq are simplified to the following analytical expression: ∫ 0 T / 2 g false( prefix+ false) ( x ̅ s , v false( t false) ) .25em normald t 0em true︸ normalΔ x false( prefix+ false) prefix+ ∫ T / 2 T g false( prefix− false) ( x ̅ s , v false( t false) ) .25em normald t 0em true︸ normalΔ x false( prefix− false) = 0 The above equation allows calculation of the mean value x̅ s of the steady-state periodic oscillation in the memristor state x , for a predefined high-frequency periodic voltage input v ( t ). Importantly, eq describes the condition for the emergence of the fading memory phenomenon in memristors, − based on which the steady-state time-response of the state variable x ( t ), depends on the characteristics of the voltage input v ( t ), but not on the initial memristor state x 0 (see Figure d, e). Through eq , the theoretical investigation performed in ref and ref provided a mathematical proof for the fading memory phenomenon in resistive switches that exhibit asymmetric switching kinetics with respect to the input polarity.…”

Tailor-made synaptic dynamics based on memristive devices

“…A theoretical tool to help in the analysis is the dynamic route map (DRM) (Chua (2018); Ascoli et al (2018); Marrone et al (2022)), which tracks the change of the state variable over time. This theoretical concept has already been successfully applied to describe the switching characteristics of ReRAMs (Maldonado et al (2020); Ascoli et al (2022)) and PCM (Marrone et al (2022)). In the deterministic view, the DRM (as the transition time) is independent of the initial value of the state variable.…”

Correlation between Electronic Structure, Microstructure, and Switching Mode in Valence Change Mechanism Al2O3/TiOx‐Based Memristive Devices

“…However, it should be mentioned that rather linear potentiation/depression characteristics can also be realized in filamentary switching devices if the pulse width meets the transition time of the switching event. [40,41]…”