The utilization of bipolar-type memristive devices for the realization of synaptic connectivity in neural networks strongly depends on the ability of the devices for analog conductance modulation under application of electrical stimuli in the form of identical voltage pulses. Typically, filamentary valence change mechanism (VCM)-type devices show an abrupt SET and a gradual RESET switching behavior. Thus, it is challenging to achieve an analog conductance modulation during SET and RESET. Here, we show that analog as well as binary conductance modulation can be achieved in a Pt/HfO2/TiOx/Ti VCM cell by varying the operation conditions. By analyzing the switching dynamics over many orders of magnitude and comparing to a fully dynamic switching model, the origin of the two different switching modes is revealed. SET and RESET transition show a two-step switching process: a fast conductance change succeeds a slow conductance change. While the time for the fast conductance change, the transition time, turns out to be state-independent for a specific voltage, the time for the slow conductance change, the delay time, is highly state-dependent. Analog switching can be achieved if the pulse time is a fraction of the transition time. If the pulse time is larger than the transition time, the switching becomes probabilistic and binary. Considering the effect of the device state on the delay time in addition, a procedure is proposed to find the ideal operation conditions for analog switching.

Bipolar resistive switching (BRS) cells based on the valence change mechanism show great potential to enable the design of future non-volatile memory, logic and neuromorphic circuits and architectures. To study these circuits and architectures, accurate compact models are needed, which showcase the most important physical characteristics and lead to their specific experimental behavior. If BRS cells are to be used for computation-in-memory or for neuromorphic computing, their dynamical behavior has to be modeled with special consideration of switching times in SET and RESET. For any realistic assessment, variability has to be considered additionally. This study shows that by extending an existing compact model, which by itself is able to reproduce many different experiments on device behavior critical for the anticipated device purposes, variability found in experimental measurements can be reproduced for important device characteristics such as I-V characteristics, endurance behavior and most significantly the SET and RESET kinetics. Furthermore, this enables the study of spatial and temporal variability and its impact on the circuit and system level.

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With the arrival of the Internet of Things (IoT) and the challenges arising from Big Data, neuromorphic chip concepts are seen as key solutions for coping with the massive amount of unstructured data streams by moving the computation closer to the sensors, the so-called “edge computing.” Augmenting these chips with emerging memory technologies enables these edge devices with non-volatile and adaptive properties which are desirable for low power and online learning operations. However, an energy- and area-efficient realization of these systems requires disruptive hardware changes. Memristor-based solutions for these concepts are in the focus of research and industry due to their low-power and high-density online learning potential. Specifically, the filamentary-type valence change mechanism (VCM memories) have shown to be a promising candidate In consequence, physical models capturing a broad spectrum of experimentally observed features such as the pronounced cycle-to-cycle (c2c) and device-to-device (d2d) variability are required for accurate evaluation of the proposed concepts. In this study, we present an in-depth experimental analysis of d2d and c2c variability of filamentary-type bipolar switching HfO2/TiOx nano-sized crossbar devices and match the experimentally observed variabilities to our physically motivated JART VCM compact model. Based on this approach, we evaluate the concept of parallel operation of devices as a synapse both experimentally and theoretically. These parallel synapses form a synaptic array which is at the core of neuromorphic chips. We exploit the c2c variability of these devices for stochastic online learning which has shown to increase the effective bit precision of the devices. Finally, we demonstrate that stochastic switching features for a pattern classification task that can be employed in an online learning neural network.