Utilizing the Switching Stochasticity of HfO2/TiOx-Based ReRAM Devices and the Concept of Multiple Device Synapses for the Classification of Overlapping and Noisy Patterns

Abstract

With the arrival of the Internet of Things (IoT) and the challenges arising from Big Data, neuromorphic chip concepts are seen as key solutions for coping with the massive amount of unstructured data streams by moving the computation closer to the sensors, the so-called “edge computing.” Augmenting these chips with emerging memory technologies enables these edge devices with non-volatile and adaptive properties which are desirable for low power and online learning operations. However, an energy- and area-efficient realization of these systems requires disruptive hardware changes. Memristor-based solutions for these concepts are in the focus of research and industry due to their low-power and high-density online learning potential. Specifically, the filamentary-type valence change mechanism (VCM memories) have shown to be a promising candidate In consequence, physical models capturing a broad spectrum of experimentally observed features such as the pronounced cycle-to-cycle (c2c) and device-to-device (d2d) variability are required for accurate evaluation of the proposed concepts. In this study, we present an in-depth experimental analysis of d2d and c2c variability of filamentary-type bipolar switching HfO2/TiOx nano-sized crossbar devices and match the experimentally observed variabilities to our physically motivated JART VCM compact model. Based on this approach, we evaluate the concept of parallel operation of devices as a synapse both experimentally and theoretically. These parallel synapses form a synaptic array which is at the core of neuromorphic chips. We exploit the c2c variability of these devices for stochastic online learning which has shown to increase the effective bit precision of the devices. Finally, we demonstrate that stochastic switching features for a pattern classification task that can be employed in an online learning neural network.

Neuromorphic Synapses with High Switching Uniformity and Multilevel Memory Storage Enabled through a Hf-Al-O Alloy for Artificial Intelligence

“…Under a constant read voltage of 0.2 V, the resistances in these five states show steady retention up to 10,000 s, indicating that the memristor has excellent data retention operation. 59,60 These five resistance states provide a one-of-a-kind chance to achieve multilevel memory in a single cell, boosting memory capacity and showing that the memristor has potential uses in high-density storage. The RS mechanism of a memristor is depicted in Figure 4d, which may be described as a steady increase in filament size by increasing current limitations during the set process.…”

Nanoscale-Resistive Switching in Forming-Free Zinc Oxide Memristive Structures

“…The advantages of ReRAM include non-volatility, low power consumption, high speed, small dimensions (~10 nm), as well as low manufacturing costs, and the ability to integrate with CMOS technology [ 16 , 17 ]. It should be noted that there is a theoretical possibility of reducing the ReRAM memory element to the atomic level, which will further improve the characteristics of the resistive switching effect by improving the uniformity of the nanoscale conduction channel, as well as reducing the current flowing through the ReRAM memory element, which will lead to a further decrease in power consumption [ 18 , 19 , 20 , 21 , 22 , 23 , 24 , 25 , 26 , 27 , 28 , 29 ].…”

Comprehensive Model of Electron Conduction in Oxide-Based Memristive Devices

“…Thus, a high resistance ratio may be beneficial, especially if the memristive array is operated without a transistor, but with a nonlinear selector device at each node. Binary memristive devices have been also proposed for binarized neural networks or in compound synapses. , In this case, some resistance overlap may not deteriorate the function but is even beneficial in order to mimic an analog behavior. If single memristive devices are exploited as single analog synapses in artificial neural networks, the devices should show easily programmable analog resistance states.…”