A Compact Explicit Model for Long-Channel Gate-All-Around Junctionless MOSFETs. Part I: DC Characteristics

Abstract

In this paper, we solved Poisson equation in cylindrical coordinates using approximations to obtain a compact model for the drain current of long-channel junctionless gate-all-around MOSFETs. The resulting model is analytical, explicit, and valid for depletion and accumulation, and consists of simple physically based equations, for better understanding of this device, and also easier implementation and better computation speed as a compact model. The agreement with TCAD simulations is very good.

Compact modeling of 3D vertical junctionless gate-all-around silicon nanowire transistors towards 3D logic design

“…Static leakage current density of the order of 0.16-0.174 µA/µm 2 has been extracted from model simulation. On the other hand, the ION/IOFF ratios were extracted in the range of 0.65-0.66×10 4 . These values are summarized in Table II, in addition to the metrics related to computational complexity.…”

“…Corresponding author E-mail address: chhandak.mukherjee@ims-bordeaux.fr (Chhandak Mukherjee) of operation and are compatible with existing SPICE design framework. There have been several such modeling approaches for junctionless nanowire transistors, including that of [3,4], which have mainly focused on long-channel JLNTs. Moreover, most of these works have used TCAD data for model validation, and thus lack validation against experimental data from actual JLNTs.…”

Compact Modeling of 3D Vertical Junctionless Gate-all-around Silicon Nanowire Transistors

“…The model formulation is based on the unified chargebased control model (UCCM) elaborated in [3] for longchannel devices, which furthers the physical basis of the JLNT model presented in [4]. To overcome the limitations of the latter model, specifically in terms of the piece-wise continuous drain current model that requires additional smoothing functions and fitting parameters to bridge the depletion and accumulation modes of operation, the explicit and non-piece-wise solution in [3] treats the mobile charge (Qm) as decoupled between the depletion (QDP) and complementary (QC) components.…”

“…With the depletion charge, Qdep=qNDR/2, the effective charge during depleteion, Qeff = QscηCoxφT/(Qsc+ηCoxφT), Qsc=2εSiφT/R, R being the nanowire diameter, η being an interface trap parameter, φT being the thermal voltage and V is the potential along the channel. Lambert W functions, LW, have been used in both [3] and [4] for developing the solution for total mobile charge in the JLNT. While the expression for QDP in (1) predicts the depletion contribution correctly (for Vg<Vth), it underestimates the value of the drain current above the flat-band condition.…”

“…While JLNTs are certainly crucial building blocks for ultimate scaling of MOS transistors especially to support complex circuit architectures in high-speed logic applications, it is essential for the designers to have a physics-based, accurate, computationally efficient compact model which is independent of fitting parameters, has an explicit and continuous solution over the entire range of operation and is compatible with existing SPICE design framework. There have been several such modeling approaches, including that of [3,4], which have mainly focused on long-channel JLNTs. Moreover, most of these works have used TCAD data for model validation, and thus lack validation against experimental data from actual JLNTs.…”