A 70 MHz Multiplierless FIR Hilbert Transformer in 0.35  m Standard CMOS Library

Takahashi, Yasuhiro; Sekine, Toshikazu; Yokoyama, Michio

doi:10.1093/ietfec/e90-a.7.1376

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Cited by 4 publications

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“…Our experiments were implemented in MATLAB using a 2.2 GHz computer with 1024 MB memory. In these examples we set the parameters γ = 1.0, β = 0.6 in Equation (2) if we assume that the MCMs are fabricated in a 0.35 µm standard CMOS process [7], [10].…”

Section: Design Example Resultsmentioning

confidence: 99%

A new horizontal and vertical common subexpression elimination method for multiple constant multiplication

Kato

Takahashi

Sekine

2009

2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)

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The common subexpression elimination (CSE) techniques address the issue of minimizing the number of adders needed to implement the multiple constant multiplication (MCM) blocks. In this paper, we propose a new CSE method using a combining horizontal and vertical technique. The proposed method searches firstly the frequency of higher order horizontal common subexpression, i.e., 3-5 bits, and then searches vertical. Our simulation results show that our method offers a good tradeoff between the implementation cost and the synthesis runtime in comparison with conventional methods.

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Section: Design Example Resultsmentioning

confidence: 99%