2012 International Conference on Informatics, Electronics &Amp; Vision (ICIEV) 2012
DOI: 10.1109/iciev.2012.6317409
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Design of a programmable digital IIR filter based on FPGA

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Cited by 15 publications
(1 citation statement)
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“…Most of digital signal processing applications necessitate a resilient digital filter block based on low cost, less memory and low power design strategy. In the further view of digital filters, FIR and IIR architectures are presented in the previous studies [4][5][6][7][8][9][10][11]. When compared to the FIR counterparts, IIR filter structures presents more flexibility, less memory requirement and reduced design time.…”
Section: Introductionmentioning
confidence: 99%
“…Most of digital signal processing applications necessitate a resilient digital filter block based on low cost, less memory and low power design strategy. In the further view of digital filters, FIR and IIR architectures are presented in the previous studies [4][5][6][7][8][9][10][11]. When compared to the FIR counterparts, IIR filter structures presents more flexibility, less memory requirement and reduced design time.…”
Section: Introductionmentioning
confidence: 99%