2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers 2006
DOI: 10.1109/isscc.2006.1696091
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A 2.5Gb/s/pin 256Mb GDDR3 SDRAM with Series Pipelined CAS Latency Control and Dual-Loop Digital DLL

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Cited by 14 publications
(2 citation statements)
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“…DCC is divided into analog [6,7] and digital [1], [8][9][10][11][12] types according to the method of detecting the duty-cycle of the signal. Since analog DCC detects the duty-cycle by using capacitors, it takes a long time to settle and may cause duty fluctuations due to leakage current [11].…”
Section: Introductionmentioning
confidence: 99%
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“…DCC is divided into analog [6,7] and digital [1], [8][9][10][11][12] types according to the method of detecting the duty-cycle of the signal. Since analog DCC detects the duty-cycle by using capacitors, it takes a long time to settle and may cause duty fluctuations due to leakage current [11].…”
Section: Introductionmentioning
confidence: 99%
“…Thus, digital DCC is preferred in various applications, which is advantageous for maintaining duty-cycle corrected information, considering standby mode or power down mode [12]. In digital DCCs, there are methods using phase interpolation (PI) [8][9] and HCDL [1], [10][11][12]. The conventional PI method consists of tied two inverters with an output capacitor.…”
Section: Introductionmentioning
confidence: 99%