A 50–1600 MHz Wide–Range Digital Duty–Cycle Corrector With Counter–Based Half–Cycle Delay Line

Abstract

Duty-cycle distortion may occur due to variations in the process, voltage, and temperature, or if the clock signal passes through clock buffers. To compensate duty-cycle distortion, a digital duty-cycle corrector (DCC) with counter-based half-cycle delay line (HCDL) is introduced. The HCDL of conventional edge combiner-type DCC requires a large area and makes the DCC unsuitable for applications that operate at a wide-range frequency, such as memory or ADC interfaces. The proposed counter-based HCDL reduces the silicon cost by repeating the delay line while maintaining the performance of the conventional DCC. The proposed DCC is divided into two operations. The training operation is performed for wide-range operation, followed by normal operation performed through the result of the training operation. A prototype chip fabricated in a 65nm CMOS process has an area of 0.0064mm 2 and consumes 2.1mW at 1.6GHz. The measurement results show that the duty-cycle error is less than 0.89% over an input duty-cycle range of 20-80% for 50-1600MHz. INDEX TERMSMemory interface, ADC interface, digital duty-cycle corrector (DCC), half-cycle delay line (HCDL), wide-range.FIGURE 1. Block diagram of the conventional DCC with HCDL.

A wide-frequency all-digital duty cycle corrector with self-adaptive configurable delay chain

“…The DCC circuits [17,20,21] can cover a wide frequency range, but the unit delay generates significant correction errors at high frequencies. The DCC circuits [16,23,24,25,26,27,28,29] utilize the long delay chain with plenty of small delay units to cover a wide operating frequency range, which leads to very complex control circuits and increases circuit area. Additionally, the total delay length and the unit delay vary with the process, voltage, temperature (PVT) variations [18,21,30,31], which seriously limits the operating frequency range of circuit and affects correction accuracy at different frequencies.…”