2009
DOI: 10.1109/jssc.2009.2014733
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A 12-Gb/s 11-mW Half-Rate Sampled 5-Tap Decision Feedback Equalizer With Current-Integrating Summers in 45-nm SOI CMOS Technology

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Cited by 76 publications
(43 citation statements)
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“…To speed up multiplication and summation operations, current-steering multiplication is widely used for its speed. For the same reason, current mode summation including current-integrating summers that offer the key advantage of high-speed and low power consumption is widely preferred [52,[67][68][69].…”
Section: Channel Equalizationmentioning
confidence: 99%
“…To speed up multiplication and summation operations, current-steering multiplication is widely used for its speed. For the same reason, current mode summation including current-integrating summers that offer the key advantage of high-speed and low power consumption is widely preferred [52,[67][68][69].…”
Section: Channel Equalizationmentioning
confidence: 99%
“…The DFE cancels post-cursor ISIs without high-frequency noise enhancement. Although the current integration is very effective for eliminating the high-frequency noise, the integrator output may not provide with a sufficient integration amplitude when the input data changes at every cycle, resulting in BER degradation [3]. Moreover, the latency of the first feedback tap in the DFE may sacrifice the effective integration time, which lead to further reduction of integration amplitude [4].…”
Section: Introductionmentioning
confidence: 99%
“…Several approaches have been proposed to alleviate problems due to feedback tap latency and input pattern dependency [3,5], but have their own demerits. Softdecision method in [3] can alleviate the effect of the feedback latency, but should use a current-mode logic (CML) that causes high power consumption and cannot work as a high-sensitivity sampler.…”
Section: Introductionmentioning
confidence: 99%
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“…The DFE can eliminate post-cursor ISI without amplifying noise and crosstalk. However it may introduce the problem of error propagation [1][2][3]. From above viewpoint, this paper presents a 10 GB/s equalizer consisting of a linear equalizer and a nonlinear DFE in receiver for better equalization performance.…”
Section: Introductionmentioning
confidence: 99%