2006 IEEE Compound Semiconductor Integrated Circuit Symposium 2006
DOI: 10.1109/csics.2006.319941
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A 100-Gb/s 1:4 Demultiplexer in InP DHBT Technology

Abstract: This paper presents a 1:4 demultiplexer fabricated in InP DHBT technology. The demultiplexer is verified to work up to 100 Gb/s at a supply voltage of -3.6 V consuming 2.1 W. It is a half-rate demultiplexer using a multi-phase clock architecture. To verify operation up to 100 Gb/s we used an inhouse PRBS generator chip.

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Cited by 8 publications
(1 citation statement)
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“…The IC was fabricated in Vitesse's VIP2 InP DHBT technology with f T and f max greater than 300 GHz [9]. Before packaging, the IC was tested using wafer probing and errorfree operation was obtained for an input data-rate up to 100 Gb/s [3]. …”
Section: Introductionmentioning
confidence: 99%
“…The IC was fabricated in Vitesse's VIP2 InP DHBT technology with f T and f max greater than 300 GHz [9]. Before packaging, the IC was tested using wafer probing and errorfree operation was obtained for an input data-rate up to 100 Gb/s [3]. …”
Section: Introductionmentioning
confidence: 99%