A 1-volt, high PSRR, CMOS bandgap voltage reference

Mehrmanesh, S.; Vahidfar, M.B.; Aslanzadeh, H.A.; Atarodi, M.

doi:10.1109/iscas.2003.1205580

Cited by 16 publications

(11 citation statements)

References 3 publications

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“…In this program for each value of [P, M, N, K], R 1 is calculated based on (8) (in a desired T 0 ). Then, I 1 is calculated from (7) and corresponding to that the values of K os , P diss and S are extracted from (3), (13) and (14), respectively. Then, corresponding to each [K os , P diss , S tot ], FOM is determined by (15).…”

Section: Optimization Processmentioning

confidence: 99%

“…Thus, it could be generalized for any other BGR topology. Using (4a, 4b) and (5), it is possible to calculate an equation similar to (8) for other topologies even with more complex structure and more design parameters such as the circuits shown in [13][14][15]. …”

Section: Optimization Processmentioning

confidence: 99%

“…Meanwhile, the gain and bandwidth of the amplifier A V affect directly the PSR (power supply rejection) of the proposed BGR [13]. In this work, the topology of amplifier A V is similar to the amplifier used in [6] [see Fig.…”

Section: Device Sizingmentioning

confidence: 99%

See 2 more Smart Citations

An area and power optimization technique for CMOS bandgap voltage references

Tajalli

Chahardori

Khodaverdi

2009

Analog Integr Circ Sig Process

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This article explores the main tradeoffs in design of power and area efficient bandgap voltage reference (BGR) circuits. A structural design methodology for optimizing the silicon area and power dissipation of CMOS BGRs will be introduced. For this purpose, basic equations of the bandgap circuit have been adapted such that can simply be applied in the optimization process. To improve the reliability of the designed circuit, the effect of amplifier offset has been also included in the optimization process. It is also shown that the minimum achievable power consumption and area are highly depending on the fabrication process parameters especially sheet resistivity of the available resistors in the technology and also the area of bipolar transistors. The proposed technique does not depend on a special process and can be applied for designing bandgap reference circuits with different topologies.

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Section: Optimization Processmentioning

confidence: 99%

Section: Optimization Processmentioning

confidence: 99%

See 1 more Smart Citation

An area and power optimization technique for CMOS bandgap voltage references

Tajalli

Chahardori

Khodaverdi

2009

Analog Integr Circ Sig Process

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“…While usually a perfect, constant reference voltage V REF with a zero temperature coefficient is desirable, depending on the used circuit architecture, different non-idealities result in the deviation of V REF from its nominal value. Among all nonideality sources, the supply noise injected to the output of a bandgap reference circuit is the most significant noise which dramatically impacts the accuracy of V REF [1]. The situation worsens as the frequency increases leading to poor PSRRs at high frequencies e.g.…”

Section: Introductionmentioning

confidence: 99%

A high PSRR fully-MOSFET voltage reference with virtually diode-connected MOS transistors

Souri

Shamsi

Kazemi

2010

Proceedings of the 8th IEEE International NEWCAS Conference 2010

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This paper presents a voltage reference that utilizes the virtually diode-connected MOS transistors, biased in the weak-inversion region. The proposed architecture increases the gain of the feedback loop that consequently reduces the system sensitivity, and hence improves the PSRR. The circuit is designed and simulated in a standard 0.18µm CMOS technology. The simulation results in HSPICE indicate successful operation of the circuit as follows: the PSRR at DC frequency is 94 dB and for the temperature range from -55ºC to 125ºC, the variation of the output reference voltage is less than 83ppm/ ºC.

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“…A fonte de tensão de referência bandgap utiliza a combinação de duas tensões com coeficientes de temperatura próximos, mas de sinais opostos como mostrada na Figura 5. Uma destas é a tensão base-emissor (V BE ) de um transistor bipolar que possui um coeficiente de temperatura de aproximadamente -2 mV/ºC [5,6]. A outra é gerada a partir da tensão térmica U T , que possui um coeficiente de temperatura positivo, extraída, por exemplo, utilizando a tensão na junção de diodos.…”

Section: Referências Bandgapunclassified

Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF.

Hamanaka¹

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A 1-volt, high PSRR, CMOS bandgap voltage reference

Cited by 16 publications

References 3 publications

An area and power optimization technique for CMOS bandgap voltage references

An area and power optimization technique for CMOS bandgap voltage references

A high PSRR fully-MOSFET voltage reference with virtually diode-connected MOS transistors

Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF.

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