A 1.248 Gb/s - 2.918 Gb/s Low-Power Receiver for MIPI-DigRF M-PHY with a Fast Settling Fully Digital Frequency Detection Loop in 0.11 ㎛ CMOS

Kim, Sang-Yun; Lee, Juri; Park, Hyung-Gu; Pu, Young Gun; Lee, Jae Yong; Lee, Kang-Yoon

doi:10.5573/jsts.2015.15.4.506

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“…Specific to integration of audio/visual transmission, there remains the future possibility of integrating a customizable FPGA design with the MIPI alliance M-PHY interface. The M-PHY protocol is a physical layer adaptation specifically designed for high throughput, low powered wireless applications that is currently utilized in cell phones [ 71 , 72 , 73 ] and has the potential to be applied to IoT edge nodes for wireless applications.…”

Section: High Performance Networkmentioning

confidence: 99%

Review of State-of-the-Art FPGA Applications in IoT Networks

Magyari

Chen

2022

Sensors

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Modern networks used for integrating custom Internet of Things (IoT) systems and devices have restrictions and requirements unique to their individual applications. These application specific demands require custom designed hardware to maximize throughput, security and data integrity whilst minimizing latency, power consumption, and form factor. Within this paper, we describe current, state-of-the-art works that utilize FPGAs for IoT network developments. We analyze two categories of works: those that prioritize reducing power consumption, and those that prioritize networking features. Further, we describe how future works can improve upon these designs and therefore improve the efficiency of resource-constrained IoT networks.

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Section: High Performance Networkmentioning

confidence: 99%