A 0.25-V 22-nS symmetrical bulk-driven OTA for low-frequency $$G_m$$ G m -C applications in 130-nm digital CMOS process

Abstract

This paper presents a 0.25-V supplied bulkdriven symmetrical OTA implemented in 130-nm CMOS process. By operating in weak inversion, and using a distributed layout approach, the OTA can benefit from the voltage reduction and high linearity enabled by haloimplanted transistors. The proposed circuit consumes only 10-nW, features a low transconductance of 22-nS, and a total harmonic distortion of 0.53 % for a 100-mV pp input voltage, thus making it suitable for low-frequency and lowpower G m -C applications.

0.3‐V bulk‐driven programmable gain amplifier in 0.18‐µm CMOS

“…In order to realize a highly linear rail to rail PGA, there is a need for an ULV highly linear OTA circuit. In literature we can find a very few examples of similar circuits [2,3,23]. In this design, the solution recently proposed in [3] has been adopted, because it exhibits excellent linearity performance in a large range of biasing currents and input voltages, can operate with V DD < V TH and its structure is well suited for programming purposes.…”

“…The increasing interest in ultra low voltage (ULV) and ultra low power (ULP) electronic circuits supplied with energy harvesters has motivated many researchers to develop novel circuit structures operating from supply voltages substantially lower than 0.5 V. The most interesting examples include operational amplifiers [1], linear operational transconductance amplifiers (OTAs) [2,3], differential-difference amplifiers [4] or different kinds of delta-sigma modulators [5,6]. Despite the increasing amount of different sub 0.5-V analog circuit solutions, many commonly used analog building blocks have not been addressed yet.…”

A 0.3-V 98-dB Rail-to-Rail OTA in $0.18~\mu$ m CMOS

“…The increasing demand for ultra-low-power electronic systems, entails an increasing interest in the design of analog and mixed signal circuits, powered with very low supply voltages, often much lower than 0.5 V. These new designs include operational amplifiers [1]- [8], linear transconductors [9], [10], differential-difference amplifiers [11] hysteretic comparators [12], and many other building blocks. In order to ensure sufficient voltage swing at such extreme supply conditions, a bulk-driven (BD) technique [13], [14] is often considered.…”

Sub-threshold, cascode compensated, bulk-driven OTAs with enhanced gain and phase-margin

“…G. raikos, S. Vlassis have implemented 100% positive feedback at gate terminals of bulk-driven input pair to enhance its transconductance [6]. Many other authors have suggested partial positive feedback to enhance the transconductance and GBW for bulk-driven pair [7][8][9][10][11][12][13][14][15][16] and this partial-regeneration increases the current drive capability of low bias current ( o150 nA) based sub-threshold circuits. Though the BD-MOST approach overcomes the need of V TH (0.5 V), yet it requires MOST compliance voltage equal to that of gatedriven circuits.…”

“…Though the BD-MOST approach overcomes the need of V TH (0.5 V), yet it requires MOST compliance voltage equal to that of gatedriven circuits. The sub-threshold region operation need around 78 mV across the devices whereas strong inversion needs V OV 4200 mV, hence sub-threshold operation favors LV design [13]. So to design a high open loop gain and rail-to-rail linear OTA a source-degenerated, bulk-driven PMOS input core has been preferred in reported works [17][18][19][20][21][22].…”